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2022-02-28misc: add sl28cpld base driverMichael Walle3-0/+114
Add a multi-function device driver which will probe its children and provides methods to access the device. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-08drivers: misc: Makefile: Enable fs_loader compilation at SPL LevelKeerthy2-1/+10
Enable fs_loader compilation at SPL Level. Signed-off-by: Keerthy <j-keerthy@ti.com> [Amjad: fix compilation failures for J721e platform] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-01-25x86: Use the ACPI table writerSimon Glass1-1/+1
Use the new ACPI writer to write the ACPI tables. At present this is all done in one monolithic function. Future work will split this out. Unfortunately the QFW write_acpi_tables() function conflicts with the 'writer' version, so disable that for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25sandbox: Allow building with GENERATE_ACPI_TABLESimon Glass1-0/+1
At present this option is missing a header file, a function prototype and the qfw driver needs a header included. Fix these problems so we can enable this option on sandbox. This will increase the build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-24misc: mark write buffer constJohn Keeping1-1/+1
The write operation in misc_ops already takes a "const void *" buffer, but misc_write() takes a mutable "void *". There's no reason for this, so make misc_write() consistent with the standard write() prototype. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/20Jan2022Tom Rini1-5/+1
- fdt_support: Add fdt_for_each_node_by_compatible() helper macro (Marek) - turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali) - pci_mvebu: Add support for Kirkwood PCIe controllers (Pali) - SPL: More verifications for kwbimage in SPL (Pali) - mvebu: Remove comphy_update_map() (Pali) - Minor misc stuff
2022-01-20fdt_support: Add fdt_for_each_node_by_compatible() helper macroMarek Behún1-5/+1
Add macro fdt_for_each_node_by_compatible() to allow iterating over fdt nodes by compatible string. Convert various usages of off = fdt_node_offset_by_compatible(fdt, start, compat); while (off > 0) { code(); off = fdt_node_offset_by_compatible(fdt, off, compat); } and similar, to fdt_for_each_node_by_compatible(off, fdt, start, compat) code(); Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt4-16/+16
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-13treewide: invaild -> invalidSean Anderson1-1/+1
Somewhere along the way, someone misspelt "invalid" and it got copied everywhere. Fix it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-27Convert CONFIG_FSL_IFC to KconfigTom Rini1-0/+3
This converts the following to Kconfig: CONFIG_FSL_IFC This is done via select statements to match previous logic. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in KconfigTom Rini1-1/+1
This is a "hex" prompt but the default value was given as an int. Switch the default to hex (0x0) and remove the defconfigs that were using the default, but as hex before. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-19treewide: Use fdt_create_phandle() where appropriateMarek Behún1-6/+4
Replace fdt_alloc_phandle() with subsequent fdt_set_phandle() by fdt_create_phandle(). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-10-20Merge tag 'u-boot-imx-20211020' of ↵WIP/20Oct2021Tom Rini2-1/+10
https://source.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20211020 ------------------- First PR from u-boot-imx for 2022.01 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535 - new board: kontron-sl-mx8mm - imx8m: - fix secure boot - imx ESDHC: fixes - i.MX53: Support thum2, bmode and fixes for Menlo board usbarmory switch to Ethernet driver model - imx6 : - DDR calibration for Toradex boards - imx7: - Fixes - Updated gateworks boards (ventana / venice) # gpg verification failed.
2021-10-12Merge tag 'u-boot-stm32-20211012' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-stm - Disable ATAGS for STM32 MCU and MPU boards - Disable bi_boot_params for STM32 MCU and MPU boards - Update stm32-usbphyc node management - Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards - Convert some USB config flags to Kconfig for various boards - Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board - Remove specific CONFIG_STV0991 flags - Remove unused CONFIG_USER_LOWLEVEL_INIT flag - Add ofdata_to_platdata() callback for stm32_spi driver - Update for stm32f7_i2c driver - Remove gpio_hog_probe_all() from STM32 MP1 board - Fix bind command Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-12cmd: bind: Fix driver binding on a devicePatrice Chotard1-1/+1
Fix a regression brings by commit 84f8e36f03fa ("cmd: bind: allow to bind driver with driver data") As example, the following bind command doesn't work: bind /soc/usb-otg@49000000 usb_ether As usb_ether driver has no compatible string, it can't be find by lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(), the driver entry is known, pass it to lists_bind_fdt() to force the driver entry selection. For this, add a new parameter struct *driver to lists_bind_fdt(). Fix also all lists_bind_fdt() callers. Fixes: 84f8e36f03fa ("cmd: bind: allow to bind driver with driver data") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reported-by: Herbert Poetzl <herbert@13thfloor.at> Cc: Marek Vasut <marex@denx.de> Cc: Herbert Poetzl <herbert@13thfloor.at> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-07misc: ocotp: Allow disabling ocotp driver in SPLMichael Scott2-1/+10
This allows removal of the OCOTP driver when SPL is enabled. Disabling OCOTP reduces SPL size efficiently. Signed-off-by: Michael Scott <mike@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk2-16/+16
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing white spaceWolfgang Denk1-1/+1
Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-1/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-25irq: Tidy up of-platdata irq supportSimon Glass4-15/+34
This function is available but not exported. More generally it does not really work as intended. Reimplement it and add a sandbox test too. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Try to avoid the preprocessor with OF_REALSimon Glass1-10/+10
Convert some of these occurences to C code, where it is easy to do. This should help encourage this approach to be used in new code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Use OF_REAL instead of !OF_PLATDATASimon Glass2-2/+2
Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25treewide: Simply conditions with the new OF_REALSimon Glass1-1/+1
Use this new Kconfig to simplify the compilation conditions where appropriate. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-30Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to KconfigTom Rini1-26/+2
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR based on current usage. - Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS to Kconfig. We move these symbols around a bit and add appropriate dependencies to them. In some cases, we now add a correct default value as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-09imx8ulp: move struct mu_type to common headerPeng Fan1-18/+1
Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: imx8ulp: Add fuse driver for imx8ulpYe Li2-0/+199
This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: release and configure XRDC at early phaseYe Li1-16/+20
Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update API for fuse read and writeYe Li1-0/+81
Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Update S400 API for release RDCYe Li1-2/+5
The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Add S400 API for image authenticationYe Li1-1/+120
Add S400 API for image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6Ye Li1-1/+1
According to latest S400 API doc, the the success indicate value is changed to 0xd6. So update the driver codes. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: Add MU and S400 API to communicate with SentinelYe Li4-0/+292
Add MU driver and S400 API. Need enable MISC driver to work Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-5/+5
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28pci: swap_case: Allow compilation on 32-bit machinesSimon Glass1-2/+11
At present this driver assumes that ulong is 64-bits long. On 32-bit machines it is not. Use the 64-bit code only on 64-bit machines. This makes things work correctly on 32-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Use standard calls for recovery-request checkingSimon Glass1-7/+11
Rather than calling directly into the sandbox SDL code, we can use the normal U-Boot console handling for this feature. Update the code, to make it more generic. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Support the full-size vboot contextSimon Glass1-5/+3
The v2 format is 64-bytes in size. Support this and drop v1 since it is not used anymore. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Drop cros_ec_entering_mode()Simon Glass2-14/+0
This function is not needed anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Allow reading the battery-charge stateSimon Glass1-0/+17
Add a function to read this information from the EC. It is useful for determining whether the battery has enough charge to boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-15sandbox: cros_ec: Update error handling when reading matrixSimon Glass1-5/+7
At present the return value of ofnode_get_property() is not checked, which causes a coverity warning. While we are here, use logging for the errors. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Coverity (CID: 331157)
2021-07-14misc: i2c_eeprom: Add atmel,24c01 to the listMarek Vasut1-0/+1
Linux kernel binding is using atmel,24c01 compatible string. On the other hand there is atmel,24c01a which is not listed in the kernel. Add compatible string without "a" suffix to be compatible with Linux kernel binding. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-06sandbox: cros-ec: Add tests for the Chromium OS EC PWM driverAlper Nebi Yasak1-0/+47
This patch adds a limited pulse-width modulator to sandbox's Chromium OS Embedded Controller emulation. The emulated PWM device supports multiple channels but can only set a duty cycle for each, as the actual EC doesn't expose any functionality or information other than that. Though the EC supports specifying the PWM channel by its type (e.g. display backlight, keyboard backlight), this is not implemented in the emulation as nothing in U-Boot uses this type specification. This emulated PWM device is then used to test the Chromium OS PWM driver in sandbox. Adding the required device node to the sandbox test device-tree unfortunately makes it the first PWM device, so this also touches some other tests to make sure they still use the sandbox PWM. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay5-0/+11
Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-20misc: make CONFIG_IRQ selectable for all platformsWasim Khan1-3/+2
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ selectable for all platforms. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12qemu: add MMIO driver for QFWAsherah Connor3-0/+127
Add MMIO driver for QFW. Note that there is no consumer as of this patch. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-12test: qemu: add qfw sandbox driver, dm tests, qemu testsAsherah Connor2-0/+128
A sandbox driver and test are added for the qfw uclass, and a test in QEMU added for qfw functionality to confirm it doesn't break in real world use. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-12x86: qemu: move QFW to its own uclassAsherah Connor4-162/+166
We move qfw into its own uclass and split the PIO functions into a specific driver for that uclass. The PIO driver is selected in the qemu-x86 board config (this covers x86 and x86_64). include/qfw.h is cleaned up and documentation added. Signed-off-by: Asherah Connor <ashe@kivikakk.ee> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-10pwm: Add a driver for Chrome OS EC PWMAlper Nebi Yasak1-0/+17
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control the display brightness. We can only change the duty cycle, so on set_config() we just try to match the duty cycle that dividing duty_ns by period_ns gives us. To disable, we set the duty cycle to zero while keeping the old value for when we want to re-enable it. The cros_ec_set_pwm_duty() function is taken from Depthcharge's cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type. The driver itself is very loosely based on rk_pwm.c for the general pwm driver structure. The devicetree binding file is from Linux, before it was converted to YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt to YAML format") in their repo. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-08misc: ocotp: Update OCOTP driver for iMX8MQ B2Ye Li1-1/+1
i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-27sandbox: cros_ec: Only write EC state when the EC is probedSimon Glass1-0/+4
This can crash if the EC has not yet been probed. Add a check to prevent this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass1-1/+1
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
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