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2021-01-05test: Move some test drivers into their own fileSimon Glass1-0/+1
At present several test drivers are part of the test file itself. Some of these are useful for of-platdata tests. Separate them out so we can use them for other things also. A few adjustments are needed so this driver can build for sandbox_spl as well. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-04misc: add driver for the SiFive otp controllerPragnesh Patel1-0/+1
Added a misc driver to handle OTP memory in SiFive SoCs. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-03misc: pmic_esm: Add support for PMIC ESM driverTero Kristo1-0/+1
The ESM (Error Signal Monitor) is used on certain PMIC versions to handle error signals propagating from rest of the system. If these reach the PMIC, it is typically a last resort fatal error which requires a system reset. The ESM driver does the proper configuration for the ESM module to reach this end goal. Initially, only TPS65941 PMIC is supported for this. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03misc: k3_esm: Add support for Texas Instruments K3 ESM driverTero Kristo1-0/+1
The ESM (Error Signaling Module) is used to route error signals within the K3 SoCs somewhat similar to interrupts. The handling for these is different though, and can be routed for hardware error handling, to be handled by safety processor or just as error interrupts handled by the main processor. The u-boot level ESM driver is just used to configure the ESM signals so that they get routed to proper destination. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-17common: Drop floppy disk supportSimon Glass1-1/+0
This seems pretty old now. It has not been converted to driver model and is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-15sandbox: Add a test for IRQSimon Glass1-0/+1
Add a simple sandbox test for this uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: Move UCLASS_IRQ into a separate fileSimon Glass1-0/+1
Update this uclass to support the needs of the Apollo Lake ITSS. It supports four operations. Move the uclass into a separate directory so that sandbox can use it too. Add a new Kconfig to control it and enable this on x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15sandbox: Add PCI driver and test for p2sbSimon Glass1-0/+2
Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15pci: Add support for p2sb uclassSimon Glass1-0/+1
The Primary-to-Sideband bus (P2SB) is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added in the device tree as subnodes of the p2sb. This adds a uclass and enables it for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-17misc: add driver for the Rockchip otp controllerFinley Xiao1-0/+1
Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-07misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0Tero Kristo1-0/+1
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add a driver to support this feature for K3 line of SoCs, initially for AM65x. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-24misc: microchip_flexcom: introduce microchip_flexcom driverEugen Hristev1-0/+1
The Microchip Flexcom is just a wrapper which embeds a SPI controller, an I2C controller and an USART. Only one function can be used at a time and is chosen at boot time according to the device tree. The bindings are kept as in Linux. The driver registers to MISC_UCLASS. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08sandbox: pci: Create a new sandbox_pci_read_bar() functionSimon Glass1-1/+1
The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-21spl: misc: Allow misc drivers in SPL and TPLSimon Glass1-3/+5
In some cases it is necessary to read the keyboard in early phases of U-Boot. The cros_ec keyboard is kept in the misc directory. Update the config to allow this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-19misc: Add JZ47xx efuse driverPaul Burton1-0/+1
Add driver for the efuse block in the JZ47xx SOC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
2018-11-14misc: Add IHS FPGA driverMario Six1-0/+1
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which supports initialization of the FPGA, as well as information gathering. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14misc: Add gdsys_soc driverMario Six1-0/+1
This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14misc: Sort Makefile entriesMario Six1-30/+31
Makefile entries should be sorted. Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-10-22misc: add i.MX8 misc driverPeng Fan1-0/+1
Add i.MX8 MISC driver to handle the communication between A35 Core and SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2018-10-06misc: Add support for the Arm Versatile Express config busLiviu Dudau1-0/+1
Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-09-28common: Generic loader for file systemTien Fong Chee1-0/+1
This is file system generic loader which can be used to load the file image from the storage into target such as memory. The consumer driver would then use this loader to program whatever, ie. the FPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-09-18misc: Add MPC83xx serdes driverMario Six1-0/+1
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11misc: Add gdsys_ioep driverMario Six1-0/+1
Add driver for the IHS IO endpoint on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-08-11test: Add tests for misc uclassMario Six1-1/+1
Add a set of tests for the misc uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26stm32mp1: add FUSE command supportPatrick Delaunay1-0/+1
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-08gdsys: drivers: Add gdsys_rxaui_ctrl driverMario Six1-0/+1
Add a driver for RXAUI control on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-3/+1
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-10drivers/misc: Share qbman init between archsAhmed Mansour1-0/+1
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-22dm: misc: add stm32 rcc driverChristophe Kerello1-0/+1
This patch adds the support of reset and clock control block (rcc) found on STM32 SoCs. This driver is similar to a MFD linux driver. This driver supports currently STM32H7 only. STM32F4 and STM32F7 will be migrated to this rcc MFD driver in the future to uniformize all STM32 SoCs already upstreamed. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-11misc: Kconfig: Add SPL_I2C_EEPROM optionWenyou Yang1-1/+1
This option is an SPL-variant of the I2C_EEPROM option to enable the driver for generic I2C-attached EEPROMs for SPL. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-12drivers/misc: Add basic support for ATSHA204A Crypto moduleMarek Behún1-0/+1
This module can be found on the Turris Omnia board connected via the I2C interface. Among some cryptographic functions, the chip has a 512 bit One Time Programmable memory, 88 byte configuration memory and 512 byte general purpose memory. The Turris Omnia stores serial number and device MAC address in the OTP memory. This commit adds basic support for reading the EEPROM and also exposes the chips Random Number Generator. The driver is based on code by Josh Datko, Cryptotronix, jbd@cryptotronix.com and also Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz> Signed-off-by: Marek Behun <marek.behun@nic.cz> create mode 100644 drivers/misc/atsha204a-i2c.c create mode 100644 include/atsha204a-i2c.h Signed-off-by: Stefan Roese <sr@denx.de>
2017-06-07rockchip: efuse: add (misc) driver for RK3399 non-secure efuse blockPhilipp Tomsich1-0/+1
This adds a simple driver for reading the efuse block of the RK3399. It should be easy enough to add drivers for other devices (e.g. the RK3328, RK3368, etc.) by passing the device details via driver_data. Unlike the kernel driver (using the nvmem subsystem), we don't expose the efuse as multiple named cells, but rather as a linear memory that can be read using misc_read(...). The primary use case (as of today) is the generation of a 'serial#' (and a 'cpuid#') environment variable for the RK3399-Q7 (Puma) system-on-module. Note that this adds a debug-only (i.e. only if DEBUG is defined) command 'rk3399_dump_efuses' that dumps the efuse block's content. N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to include a SoC-name (together with a comment in the function) to remind whoever adds support for additional SoCs that this function currently makes assumptions regarding the size of the fuse-box based on the RK3399. The hope is that the function is adjusted to reflect any changes resulting from generalising the driver for multiple SoCs and is then renamed. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-30Drop the pdsp188x driverSimon Glass1-1/+0
This is not used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-21status_led: Kconfig migrationUri Mashiach1-2/+2
Move all of the status LED feature to drivers/led/Kconfig. The LED status definitions were moved from the board configuration files to the defconfig files. TBD: Move all of the definitions in the include/status_led.h to the relevant board's defconfig files. Tested boards: CL-SOM-AM57x, CM-T335 Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2016-09-27misc: implement Tegra CAR core driverStephen Warren1-0/+1
The Tegra CAR (Clock And Reset) module provides control of most clocks and reset signals within the Tegra SoC. This change implements a driver for this module. However, since the module implements multiple kinds of services (clocks, resets, perhaps more), all this driver does is bind various sub-devices, which in turn provide the real services. This driver is essentially an "MFD" (Multi-Function Device) in Linux kernel speak. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-14armv8: ls2080a: Remove debug server supportYork Sun1-1/+0
Debug server feature has been dropped from roadmap. Signed-off-by: York Sun <york.sun@nxp.com>
2016-08-16misc: Add simple driver for some Nuvoton NCT6102D devicesStefan Roese1-0/+1
This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2016-08-15misc: add Tegra BPMP driverStephen Warren1-0/+1
The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. This driver provides the core low-level communication path by which feature-specific drivers (such as clock) can make requests to the BPMP. This driver is similar to an MFD driver in the Linux kernel. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-12drivers/sysreset: group sysreset driversMax Filippov1-2/+0
Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-14sandbox: Don't bring in the eeprom emulator in SPLSimon Glass1-0/+2
This driver should not be used in SPL since we do not have I2C support enabled in SPL on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14dm: sandbox: Add a simple driver to test of-platdataSimon Glass1-0/+5
Add a driver which uses of-platdata to obtain its platform data. This can be used to test the feature in sandbox. It displays the contents of its platform data. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-26Rename reset to sysresetStephen Warren1-2/+2
The current reset API implements a method to reset the entire system. In the near future, I'd like to introduce code that implements the device tree reset bindings; i.e. the equivalent of the Linux kernel's reset API. This controls resets to individual HW blocks or external chips with reset signals. It doesn't make sense to merge the two APIs into one since they have different semantic purposes. Resolve the naming conflict by renaming the existing reset API to sysreset instead, so the new reset API can be called just reset. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-05-23cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]Miao Yan1-1/+1
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23x86: qemu: split qfw command interface and qfw coreMiao Yan1-0/+1
This patch splits qfw command interface and qfw core function into two files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core. Now when qfw command interface is enabled, it will automatically select qfw core. This patch also makes the ACPI table generation select CONFIG_QFW. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-14Kconfig: Move CONFIG_FIT and related options to KconfigSimon Glass1-1/+1
There are already two FIT options in Kconfig but the CONFIG options are still in the header files. We need to do a proper move to fix this. Move these options to Kconfig and tidy up board configuration: CONFIG_FIT CONFIG_OF_BOARD_SETUP CONFIG_OF_SYSTEM_SETUP CONFIG_FIT_SIGNATURE CONFIG_FIT_BEST_MATCH CONFIG_FIT_VERBOSE CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_RSA Unfortunately the first one is a little complicated. We need to make sure this option is not enabled in SPL by this change. Also this option is enabled automatically in the host builds by defining CONFIG_FIT in the image.h file. To solve this, add a new IMAGE_USE_FIT #define which can be used in files that are built on the host but must also build for U-Boot and SPL. Note: Masahiro's moveconfig.py script is amazing. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add microblaze change, various configs/ re-applies] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-02-21superio: Add SMSC SIO1007 driverBin Meng1-0/+1
The SMSC SIO1007 superio chipset integrates two ns16550 compatible serial ports for legacy applications, 16 GPIO pins and some other functionalities like power management. This adds a simple driver to enable serial port and handle GPIO. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-28misc: Add simple driver to enable the legacy UART on Winbond Super IO chipsStefan Roese1-0/+1
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-21cros_ec: Disable the Chrome OS EC in SPLSimon Glass1-0/+2
This is not used in SPL so don't allow it to be built there, even if I2C is enabled in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21dm: Add a power sequencing uclassSimon Glass1-0/+1
Some devices need special sequences to be used when starting up. Add a uclass for this. Drivers can be added to provide specific features as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-23nios2: convert altera sysid to driver modelThomas Chou1-0/+1
Convert altera sysid to driver model with misc uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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