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path: root/drivers/i2c/designware_i2c.c
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2022-01-19doc: replace @return by Return:Heinrich Schuchardt1-4/+4
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-08-30i2c: designware: Remove unused non-DM functionalityTom Rini1-18/+0
There are no users of more than 1 i2c bus in the non-DM case currently. Remove the additional defines for this. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-07arm: Remove spear600 boards and the rest of SPEAr supportTom Rini1-11/+0
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this is the last of the SPEAr platforms, so remove the rest of the remaining support as well. Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-21dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk1-2/+2
Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-2/+2
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-1/+1
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-28i2c: designware_i2c: Don't warn if no reset controllerSimon Glass1-3/+5
At present if CONFIG_RESET is not enabled, this code shows a warning: designware_i2c_ofdata_to_platdata() i2c_designware_pci i2c2@16,0: Can't get reset: -524 Avoid this by checking if reset is supported, first. Fixes: 622597dee4f ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-22i2c: designware: Use log_debug() for debuggingSimon Glass1-2/+2
We don't want the debug output to be visible in a normal boot. Silence it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher<hs@denx.de>
2020-08-22treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To help this tedious work, this commit converts devfdt_get_addr_ptr() to dev_read_addr_ptr() by coccinelle. I also removed redundant casts because dev_read_addr_ptr() returns an opaque pointer. To generate this commit, I ran the following semantic patch excluding include/dm/. <smpl> @@ type T; expression dev; @@ -(T *)devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) @@ expression dev; @@ -devfdt_get_addr_ptr(dev) +dev_read_addr_ptr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-17i2c: designware_i2c: Support ACPI table generationSimon Glass1-0/+26
Update the PCI driver to generate ACPI information so that Linux has the full information about each I2C bus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Correct one typo in dw_i2c_gen_speed_config() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17i2c: designware_i2c: Add a little more debuggingSimon Glass1-5/+5
Add debugging for a few more values and also use log to show return values when something goes wrong. This makes it easier to see the root cause. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-05-28i2c: designware_i2c: Check if the device is poweredRaul E Rangel1-0/+17
If the device doesn't return a version that means the device is non-functional. The dw_i2c_regs had invalid offsets for the version field. I got the correct value from the DesignWare databook. It also matches what the Picasso PPR says. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested on chromebook_coral: Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-28i2c: designware_i2c: Tidy up use of NULL privSimon Glass1-11/+23
At present we still have pre-driver-model code in this driver and it makes things a bit confusing. In particular calc_bus_speed() is called with priv as NULL if not using driver model. This results in spk_cnt and comp_param1 being read from an invalid address if not using driver model. For comp_param1 this may not cause problems if reading from addresses close to 0 happens to be allowed, as high speed is only supported by DM code. But spk_cnt is subsequently used to calculate the bus periods and so this may cause problems (e.g. on spear600 board which has not been migrated yet). Add a new parameter regs parameter to calc_bus_speed() and add more comments to this function and to _dw_i2c_set_bus_speed(), which calls it. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-03-16i2c: designware_i2c: add 'hs_hcnt' and 'hs_lcnt' for high speedJun Chen1-0/+3
Add support for high speed if scl_sda_cfg exist. Signed-off-by: Jun Chen <ptchentw@gmail.com> Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16i2c: designware_i2c: remove 'has_high_speed'Jun Chen1-2/+1
Remove 'has_high_speed' config since we can check high speed support from IC_COMP_PARAM_1 register. Signed-off-by: Jun Chen <ptchentw@gmail.com> Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16i2c: designware_i2c: check is high speed possible supportJun Chen1-0/+10
To read IC_COMP_PARAM_1[3:2] to check is high speed possible, and fall back to fast mode if not. Signed-off-by: Jun Chen <ptchentw@gmail.com> Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16i2c: designware_i2c: Fix IC_CON register setting for high speed modeJun Chen1-1/+1
IC_CON[2:1] should be 3 for high speed mode Signed-off-by: Jun Chen <ptchentw@gmail.com> Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-02-18i2c: designware_i2c: Correct the selection of speed modeSimon Glass1-2/+2
Unfortunately a recent change adjusted the order of the checks here such that 400MHz now shows up as fast-plus speed (1Mbps). Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: d96440d1e3 ("i2c: designware_i2c: Add support for fast-plus speed")
2020-02-05dm: core: Create a new header file for 'compat' featuresSimon Glass1-0/+2
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05dm: core: Require users of devres to include the headerSimon Glass1-0/+1
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-01-27i2c: designware_i2c: Do more in the probe() methodSimon Glass1-8/+8
Move some of the code currently in the ofdata_to_platdata() method to probe() so that it is not executed when generating ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-27i2c: designware_i2c: Separate out the speed calculationSimon Glass1-33/+45
We want to be able to calculate the speed separately from actually setting the speed, so we can generate the required ACPI tables. Split out the calculation into its own function. Drop the double underscore on __dw_i2c_set_bus_speed while we are here. That is reserved for compiler internals. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-27i2c: designware_i2c: Move dw_i2c_speed_config to headerSimon Glass1-17/+0
This is used to store the speed information for a bus. We want to provide this to ACPI so that it can tell the kernel. Move this struct to the header file so it can be accessed by the ACPI i2c implementation being added later. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-27i2c: designware_i2c: Add support for fast-plus speedSimon Glass1-2/+10
Fast-plus runs at 1MHz and is used by some devices. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-27i2c: designware_i2c: Update to use standard enums for speedSimon Glass1-5/+5
Update this driver to use the new standard enums for speed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Add spike supressionSimon Glass1-1/+9
Some versions of this peripheral include a spike-suppression phase of the bus. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Rewrite timing calculationSimon Glass1-22/+147
At present the driver can end up with timing parameters which are slightly faster than those expected. It is possible to optimise the parameters to get the best possible result. Create a new function to handle the timing calculation. This uses a table of defaults for each speed mode rather than writing it in code. The function works by calculating the 'period' of each bit on the bus in terms of the input clock to the controller (IC_CLK). It makes sure that the constraints are met and that the different components of that period add up correctly. This code was taken from coreboot which has ended up with this same driver, but now in a much-different form. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Put hold config in a structSimon Glass1-27/+55
Create a struct to hold the three timing parameters. This will make it easier to move these calculations into a separate function in a later patch. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Drop scl_sda_cfg parameterSimon Glass1-6/+8
Instead of passing this parameter into __dw_i2c_set_bus_speed(), pass in the driver's private data, from which the function can obtain that information. This allows the function to have access to the full state of the driver. Signed-off-by: Sicomp_param1mon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-27i2c: designware_i2c: Read device-tree propertiesSimon Glass1-2/+6
The i2c controller defines a few timing properties. Read these in and store them for use by the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Use an accurate bus clock instead of MHzSimon Glass1-10/+8
At present the driver uses an approximation for the bus clock, e.g. 166MHz instead of 166 2/3 MHz. This can result in small errors in the resulting I2C speed, perhaps 0.5% or so. Adjust the existing code to start from the accurate figure, even if later rounding reduces this accuracy. Update the bus speed code to work in KHz instead of MHz, which removes most of the error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Use an enum for selected speed modeSimon Glass1-1/+1
Group these #defines into an enum to make it easier to understand the relationship between them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jun Chen <ptchentw@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Rename 'max' speed to 'high' speedSimon Glass1-5/+5
Some SoCs support a higher speed than what is currently called 'max' in this driver. Rename it to 'high' speed, which is the official name of the 3.4MHz speed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jun Chen <ptchentw@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-01-27i2c: designware_i2c: Include clk.h in the header fileSimon Glass1-1/+1
We use struct clk here so really should include this header file to avoid build errors. Also switch the order of clk.h in the C file to match the required code style. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Jun Chen <ptchentw@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-12-15i2c: designware: Tidy up PCI supportSimon Glass1-89/+17
This is hacked into the driver at present. It seems better to have it as a separate driver that uses the base driver. Create a new file and put the X86 code into it. Actually the Baytrail settings should really come from the device tree. Note that 'has_max_speed' is added as well. This is currently always false but since only Baytrail provides the config, it does not affect operation for other devices. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-09i2c: designware: Get clock rate from clock DMLey Foon Tan1-10/+45
Get clock rate from clock DM if CONFIG_CLK is enabled. Otherwise, uses IC_CLK define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Acked-by: Marek Vasut <marex@denx.de>
2019-07-09i2c: designware_i2c: Restore enable state after set speedJun Chen1-2/+7
Before calling __dw_i2c_set_bus_speed(), the I2C could already be set as ether enable or disable, we should restore the original setting instead of enable i2c anyway. This patch fix a bug happened in init function: __dw_i2c_init(){ /* Disable i2c */ ... __dw_i2c_set_bus_speed(i2c_base, NULL, speed); writel(slaveaddr, &i2c_base->ic_sar); /* Enable i2c */ } In this case, enable i2c inside __dw_i2c_set_bus_speed() function will cause ic_sar write fail. Signed-off-by: Jun Chen <ptchentw@gmail.com>
2019-04-25i2c: designware: fix reset handling on socfpga gen5Simon Goldschmidt1-6/+14
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide reset-names). The actual bug was to check 'if (&priv->reset_ctl)', which is never false. While at it, convert the driver to use 'reset_get_bulk' instead of looking at a specific named reset and also make it release the reset on driver remove before starting the OS. Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-20i2c: designware: Add error checking on initSimon Glass1-10/+19
At present this driver does not check whether it is able to actually communicate with the I2C controller. It prints a timeout message but still considers the probe to be successful. To fix this, add some checking that the init succeeds. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-17i2c: designware: add reset ctrl to driverDinh Nguyen1-0/+10
Add code to look for a reset manager property. Specifically, look for the reset-names of 'i2c'. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-08-10i2c: designware: Allow sending restart conditionsMarek Vasut1-1/+2
Allow sending restart conditions upon direction change as this is required by some chips. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denxx.de>
2017-06-01dm: Rename dev_addr..() functionsSimon Glass1-1/+1
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-24i2c: designware: Avoid overwriting the cmd_data registerMarek Vasut1-6/+17
Make sure the driver writes the cmd_data register only once per read transfer instead of doing so potentially repeatedly. In case the read transfer didn't finish quickly enough, the loop in the driver code would spin fast enough to write the same value into the cmd_data register again before re-checking whether the transfer completed, which would cause another spurious read transfer on the bus. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-05-17i2c: designware_i2c: Optionally check enable status registerStefan Roese1-0/+9
Some platforms don't implement the enable status register at offset 0x9c. The SPEAr600 platform is one of them. The recently added check to this status register can't be performend on these platforms. This patch introduces a new config option that can be enabled on such platforms not supporting this register. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2016-04-25i2c: designware_i2c: Add support for PCI(e) based I2C cores (x86)Stefan Roese1-12/+106
This patch adds support for the PCI(e) based I2C cores. Which can be found for example on the Intel Bay Trail SoC. It has 7 I2C controllers implemented as PCI devices. This patch also adds the fixed values for the timing registers for BayTrail which are taken from the Linux designware I2C driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-04-25i2c: designware_i2c: Add DM supportStefan Roese1-26/+123
This patch adds DM support to the designware I2C driver. It currently supports DM and the legacy I2C support. The legacy support should be removed, once all platforms using it have DM enabled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
2016-04-25i2c: designware_i2c: Prepare for DM driver conversionStefan Roese1-83/+90
This patch prepares the designware I2C driver for the DM conversion. This is mainly done by removing struct i2c_adapter from the functions that shall be used by the DM driver version as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
generated by cgit v1.1 at 2024-07-15 12:44:05 +0000