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path: root/drivers/clk/rockchip
AgeCommit message (Expand)AuthorFilesLines
2018-01-09rockchip: clk: bind reset driverElaine Zhang8-0/+70
2017-11-30rockchip: rk3128: add clock driverKever Yang2-1/+598
2017-11-26rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich1-6/+2
2017-11-21rockchip: clock: update sysreset driver bindingKever Yang8-24/+112
2017-11-01rockchip: rk3399: init CPU clock when rkclk_init()Kever Yang1-78/+79
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada3-8/+8
2017-10-01rockchip: rk322x: fix pd_bus hclk/pclkKever Yang1-3/+3
2017-10-01rockchip: clk: fix typo in rk322x clock driverKever Yang1-1/+1
2017-10-01rockchip: clk: Add rk3399 SARADC clock supportDavid Wu1-1/+35
2017-10-01rockchip: clk: Add rk3368 SARADC clock supportDavid Wu1-0/+32
2017-10-01rockchip: clk: Add rk3328 SARADC clock supportDavid Wu1-1/+34
2017-10-01rockchip: clk: Add SARADC clock support for rk3288David Wu1-0/+41
2017-10-01rockchip: clk: Add rv1108 SARADC clock supportDavid Wu1-1/+32
2017-09-18rockchip: clk: rk3399: Convert to livetreePhilipp Tomsich1-2/+2
2017-09-18rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1Philipp Tomsich1-0/+15
2017-09-18rockchip: clk: rk3368: Convert to livetreePhilipp Tomsich1-1/+1
2017-09-15dtoc: Add support for 32 or 64-bit addressesSimon Glass2-3/+3
2017-08-13rockchip: clk: remove RATE_TO_DIVKever Yang7-29/+20
2017-08-13rockchip: clk: update dwmmc clock divKever Yang6-19/+26
2017-08-13rockchip: clk: rk3368: add support for configuring the SPI clocksPhilipp Tomsich1-26/+107
2017-08-13rockchip: clk: rk3368: mark 'priv' __maybe_unused in rk3368_clk_set_rate()Philipp Tomsich1-1/+1
2017-08-13rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clockPhilipp Tomsich1-2/+17
2017-08-13rockchip: clk: rk3368: support configuring the DRAM PLL (from TPL)Philipp Tomsich1-6/+7
2017-08-13rockchip: clk: rk3368: implement MMC/SD clock reparentingPhilipp Tomsich1-28/+91
2017-08-13rockchip: clk: rk3368: implement DPLL (DRAM PLL) supportPhilipp Tomsich1-0/+35
2017-08-13rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROMPhilipp Tomsich1-1/+17
2017-08-13rockchip: clk: rk3368: support OF_PLATDATA for the RK3368 clk driverPhilipp Tomsich1-0/+17
2017-08-13rockchip: clk: rk3368: implement bandwidth adjust for PLLsPhilipp Tomsich1-5/+12
2017-07-27rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for aut...Philipp Tomsich1-1/+1
2017-07-11rockchip: rk322x: add clock driverKever Yang2-0/+414
2017-06-23Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini1-3/+3
2017-06-23rockchip: clk: rk3036: correct setting for pll integer modeKever Yang1-3/+3
2017-06-23clk_rv1108.c: Fix unused variable warningTom Rini1-3/+0
2017-06-09rockchip: Init clocks again when chain-loadingSimon Glass1-6/+19
2017-06-09rockchip: rk3288: Convert clock driver to use shifted masksSimon Glass1-69/+52
2017-06-07rockchip: clk: Add rv1108 clock driverAndy Yan2-0/+224
2017-06-07rockchip: clock: rk3036: some fix according TRMKever Yang1-9/+9
2017-06-07rockchip: rk3036: clean mask definition for cru regKever Yang1-45/+34
2017-06-07rockchip: rk3368: Add clock driverAndy Yan2-0/+292
2017-06-01dm: Rename dev_addr..() functionsSimon Glass5-6/+6
2017-05-10rockchip: clk: rk3399: allow requests for HDMI clocksPhilipp Tomsich1-0/+7
2017-05-10rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NSPhilipp Tomsich1-0/+4
2017-05-10rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTSPhilipp Tomsich1-0/+4
2017-05-10rockchip: clk: rk3399: fix off-by one during rate calculation in i2c/spi_set_...Philipp Tomsich1-3/+2
2017-05-10rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5Philipp Tomsich1-6/+109
2017-05-10rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMCXu Ziyuan1-0/+8
2017-05-10rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan1-0/+12
2017-05-10rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan1-0/+12
2017-05-10rockchip: clk: rk3036: add ciu_clk entry for eMMC/SDIOXu Ziyuan1-0/+5
2017-04-04rockchip: clk: rk3399: 24MHz is not a power of 2Philipp Tomsich1-2/+2