rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-06-14	clk: imx8mp: use usb_core_ref for usb_root_clk	Andrey Zhizhikin	1	-1/+1
2022-06-14	clk: imx8mp: fix root clock names for ecspi	Andrey Zhizhikin	1	-3/+3
2022-04-13	clk: imx8mp: Fix 24M and 32k clock	Marek Vasut	1	-1/+11
2022-04-12	clk: imx8mp: Add ECSPI clocks	Elmar Albert	1	-1/+18
2022-04-12	clk: imxrt: Use dts for anatop base address	Jesse Taube	2	-2/+2
2022-04-12	clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock	Marek Vasut	1	-0/+20
2022-04-12	clk: imx8m: reduce rate table duplication	Angus Ainslie	6	-218/+91
2022-04-12	clk: imx8mq: Add a clock driver for the imx8mq	Angus Ainslie	3	-0/+570
2022-04-12	clk: imx8mm: add pwm clocks support	Tommaso Merciai	1	-0/+28
2022-03-30	clk: Use generic CCF ops where possible	Sean Anderson	6	-473/+16
2022-02-19	clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imx8mn	Heiko Thiery	1	-0/+2
2022-02-05	clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imxrt10{20\|50}	Heiko Thiery	1	-0/+4
2021-09-30	WS cleanup: remove SPACE(s) followed by TAB	Wolfgang Denk	1	-1/+1
2021-07-10	clk: imx8mm: Add SPI clocks	Frieder Schrempf	1	-1/+22
2021-06-09	clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3	Giulio Benetti	1	-0/+2
2021-06-09	clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB	Giulio Benetti	1	-2/+4
2021-04-06	clk: Update drivers to use -EINVAL	Simon Glass	4	-9/+9
2021-01-23	clk: imx: Add ECSPI to iMX8MN	Marek Vasut	1	-0/+29
2021-01-05	Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-next	Tom Rini	1	-1/+1
2021-01-05	dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()	Simon Glass	1	-1/+1
2020-12-06	imx: clk: added IPG Clock for I2C on imx8qm	Oliver Graute	1	-0/+24
2020-08-24	clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock	Lukasz Majewski	1	-0/+7
2020-08-24	clk: imx: Add support for pllv3 enet clock	Lukasz Majewski	1	-0/+25
2020-08-24	clk: imx6: Add definition for IMX6QDL_CLK_ENET clock	Lukasz Majewski	1	-0/+1
2020-07-14	clk: imx8m: drop clk settings	Peng Fan	2	-68/+0
2020-07-14	clk: imx8mp: Update imx8mp ccf clock driver	Ye Li	1	-0/+52
2020-07-14	clk: imx8mm/8mn: Add USB clocks	Ye Li	2	-0/+37
2020-07-14	clk: clk-imx8mn: Update clock tree and support set parent	Ye Li	1	-0/+56
2020-07-14	clk: imx8mm: Add qspi clock	Peng Fan	1	-0/+7
2020-07-14	clk: imx8mm: fix clk set parent	Peng Fan	1	-1/+4
2020-07-01	dm: Fix error handling for dev_read_addr_ptr	Sean Anderson	1	-1/+1
2020-07-01	clk: Always use the supplied struct clk	Sean Anderson	1	-2/+2
2020-05-18	common: Drop linux/bitops.h from common header	Simon Glass	1	-0/+1
2020-05-18	common: Drop linux/delay.h from common header	Simon Glass	1	-0/+1
2020-05-18	common: Drop log.h from common header	Simon Glass	9	-0/+9
2020-05-01	clk: imx: clk-imxrt1050: fix lcdif clock gate	Giulio Benetti	1	-1/+1
2020-04-18	clk: imx: add i.IMXRT1020 clk driver	Giulio Benetti	3	-0/+244
2020-04-18	clk: imx: clk-imxrt1050: add set_parent() callback	Giulio Benetti	1	-0/+19
2020-04-18	clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL	Giulio Benetti	1	-1/+8
2020-04-18	clk: imx: clk-imxrt1050: fix typo in clock name "video:"	Giulio Benetti	1	-1/+1
2020-04-18	clk: imx: pllv3: add enable_bit	Giulio Benetti	1	-0/+9
2020-02-05	dm: core: Create a new header file for 'compat' features	Simon Glass	1	-0/+1
2020-02-05	dm: core: Require users of devres to include the header	Simon Glass	5	-0/+10
2020-01-26	clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()	Giulio Benetti	1	-2/+8
2020-01-26	clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()	Giulio Benetti	1	-0/+3
2020-01-26	clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()	Giulio Benetti	1	-2/+8
2020-01-26	clk: Fix error checking of dev_read_addr_ptr	Sean Anderson	3	-3/+3
2020-01-14	clk: imx: add i.IMXRT1050 clk driver	Giulio Benetti	3	-0/+310
2020-01-14	clk: imx: pfd: add set_rate()	Giulio Benetti	1	-0/+22
2020-01-14	clk: imx: pllv3: add support for PLLV3_AV type	Giulio Benetti	1	-0/+76