aboutsummaryrefslogtreecommitdiff
path: root/doc
AgeCommit message (Collapse)AuthorFilesLines
2018-10-22x86: doc: Remove stale sections of 64-bit supportBin Meng1-17/+0
There are some sections in current doc saying 64-bit is unsupported. This apparently is out of date. Remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-22x86: doc: Mention qemu-x86_64 supportBin Meng1-2/+17
Currently only 32-bit U-Boot for QEMU x86 is documented. Mention the 64-bit support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-20pci: Update documentation to make 'compatible' string optionalMarek Vasut1-5/+9
Reword the documentation to make it clear the compatible string is now optional, yet still matching on it takes precedence over PCI IDs and PCI classes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-11Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini1-0/+8
2018-10-10Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dmTom Rini2-3/+20
Test improvements to tidy up output and drop duplicate tests Sandbox SPL/TPL support Various dm-related improvements
2018-10-10net: phy: ti: Add binding for the CLK_OUT pin muxingJanine Hagemann1-0/+3
The DP83867 has a muxing option for the CLK_OUT pin. It is possible to set CLK_OUT for different channels. Create a binding to select a specific clock for CLK_OUT pin. Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for the CLK_OUT pin muxing option") of mainline linux kernel. Signed-off-by: Janine Hagemann <j.hagemann@phytec.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driverJanine Hagemann1-0/+5
This patch adds support for enabling or disabling the lane swapping (called "port mirroring" in PHY's CFG4 register) feature of the DP83867 TI's PHY device. One use case is when bootstrap configuration enables this feature (because of e.g. LED_0 wrong wiring) so then one needs to disable it in software (at u-boot/Linux). Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping support in the DP83867 TI's PHY driver") of mainline linux kernel. Signed-off-by: Janine Hagemann <j.hagemann@phytec.de> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-09fdt: Allow indicating a node is for U-Boot proper onlySimon Glass1-1/+3
At present it is not possible to specify that a node should be used before relocation (in U-Boot proper) without it also ending up in SPL and TPL device trees. Add a new "u-boot,dm-pre-proper" boolean property for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09doc: Update docs for device tree in SPL, TPLSimon Glass2-1/+12
Make a few small updates to indicate that device tree can be used in SPL and TPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09fdt: Document the fact that dtc is now builtSimon Glass1-1/+5
This documentation is out of date now that U-Boot builds dtc automatically. Update it. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08cmd: pxe: add support for FIT config selectionPatrick Delaunay1-0/+7
Add a way in configuration files (exlinux.conf for sysboot command) to select a specific FIT configuration. The configuration is selected with a string added after the FIT filename in the label "KERNEL" or "LINUX", using the same format than bootm command: KERNEL [Filename]#<conf>[#<extra-conf[#...]] This configuration string, beginning by '#', is directly appended to bootm argument 1 after <kernel_addr_r>. bootm [<kernel_addr_r>]#<conf>[#<extra-conf[#...]] see doc/uImage.FIT/command_syntax_extensions.txt for details Example : KERNEL /fit.itb#cfg1 KERNEL /fit.itb#cfg2 Configuration can be use also for overlay management : KERNEL /fit.itb#cfg1#dtbo1#dtbo3 see doc/uImage.FIT/overlay-fdt-boot.txt for details Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-07avb_verify: support using OP-TEE TA AVBJens Wiklander1-0/+13
With CONFIG_OPTEE_TA_AVB use the trusted application AVB provided by OP-TEE to manage rollback indexes and device-lock status. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07Documentation: tee uclass and op-tee driverJens Wiklander1-0/+112
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07dt/bindings: add bindings for opteeJens Wiklander1-0/+31
Sync with c8bfafb15944 ("dt/bindings: add bindings for optee") from Linux kernel. Introduces linaro prefix and adds bindings for ARM TrustZone based OP-TEE implementation. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-03riscv: Add QEMU virt board supportBin Meng1-0/+46
This adds QEMU RISC-V 'virt' board target support, with the hope of helping people easily test U-Boot on RISC-V. The QEMU virt machine models a generic RISC-V virtual machine with support for the VirtIO standard networking and block storage devices. It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and it also uses device-tree to pass configuration information to guest software. It implements RISC-V privileged architecture spec v1.10. Both 32-bit and 64-bit builds are supported. Support is pretty much preliminary, only booting to U-Boot shell with the UART driver on a single core. Booting Linux is not supported yet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-02Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini5-7/+12
This is the PR for SPI-NAND changes along with few spi changes. [trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini1-0/+23
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-28dt-bindings: w1-eeprom: eep_sandbox: create bindingsEugen Hristev1-0/+34
Bindings for sandbox onewire eeprom driver Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28dt-bindings: w1-eeprom: ds24xxx: create bindingsEugen Hristev1-0/+37
Bindings for Maxim's ds24 onewire EEPROM families driver Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28dt-bindings: W1: w1-gpio: added bindings for w1-gpioEugen Hristev1-0/+40
Added bindings specification for bitbanged gpio driver for Dallas one wire protocol Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28doc: dtbinding: Add file system firmware loader binding documentTien Fong Chee2-0/+69
Add a document to describe file system firmware loader binding information. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28doc: Add new doc for file system firmware loader driver modelTien Fong Chee1-0/+133
Provide information about - overview of file system firmware loader driver model - describe storage device and partition in device tree source - describe fie system firmware loader API Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28video_osd: Add ihs_video_out driverMario Six1-0/+23
Add a driver for IHS OSDs on IHS FPGAs. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-25dm: Update README.txt to clarify device tree usageTom Rini1-0/+9
In the section about Device Trees add a paragraph at the end that clarifies how we decide of a tree is valid or not. We say that all bindings must either be in the specification (link provided) or in our device-tree-bindings directory. We say that most of these come from the Linux Kernel and as such some design decisions are made for us already, but that in most cases we wish to retain compatibility. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-22pinctrl: bcm6838: add pinctrl supportPhilippe Reynes1-0/+35
Add pinctrl support for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-20dt-bindings: Add bindings for SPI NAND devicesBoris Brezillon1-0/+5
Add bindings for SPI NAND chips. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20mtd: move NAND files into a raw/ subdirectoryMiquel Raynal4-7/+7
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-19doc/git-mailrc: add Stefan Roese to the kirkwood aliasBaruch Siach1-1/+1
Stefan is listed as a kirkwood maintainer since commit f822d8578ba3 (MAINTAINERS: Update Marvell custodianship). Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-11remoteproc: Introduce K3 remoteproc driverLokesh Vutla1-0/+50
Add support for K3 based remoteproc driver that communicates with TISCI to start start a remote processor. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11remoteproc: Introduce K3 system controllerLokesh Vutla1-0/+24
K3 specific SoCs have a dedicated microcontroller for doing resource management. Any HLOS/firmware on compute clusters should load a firmware to this microcontroller before accessing any resource. Adding support for loading this firmware. After the K3 system controller got loaded with firmware and started up it sends out a boot notification message through the secure proxy facility using the TI SCI protocol. Intercept and receive this message through the rproc start operation which will need to get invoked explicitly after the firmware got loaded. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11mailbox: Introduce K3 Secure Proxy DriverLokesh Vutla1-0/+40
Secure Proxy module manages hardware threads that are meant for communication between the processor entities. Adding support for this driver. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11sysreset: Add TI System Control Interface (TI SCI) sysreset driverAndreas Dannenberg1-0/+29
Devices from the TI K3 family of SoCs like the AM654x contain a Device Management and Security Controller (SYSFW) that manages the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a system reset driver that communicates to the system controller over the TI SCI protocol for allowing to perform a system- wide SoC reset. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11power domain: Introduce TI System Control Interface (TI SCI) power domain driverAndreas Dannenberg1-0/+52
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a power domain driver that communicates to the system controller over the TI SCI protocol for performing power management of various devices present on the SoC. Various power domain functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/soc/ti/ti_sci_pm_domains.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11clk: Introduce TI System Control Interface (TI SCI) clock driverAndreas Dannenberg1-0/+53
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a clock driver that communicates to the system controller over the TI SCI protocol for performing clock management of various devices present on the SoC. Various clock functionality is achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/clk/keystone/sci-clk.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11reset: Introduce TI System Control Interface (TI SCI) reset driverAndreas Dannenberg1-0/+54
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/reset/reset-ti-sci.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11firmware: Add basic support for TI System Control Interface (TI SCI) protocolLokesh Vutla1-0/+76
Texas Instrument's System Control Interface (TI SCI) message protocol is used in Texas Instrument's System on Chip (SoC) such as those in the K3 family AM654 SoC to communicate between various compute processors with a central system controller entity. The TI SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC using the mailbox client. This is mostly derived from the TI SCI driver in Linux located at drivers/firmware/ti_sci.c. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-10arm: armv7-a: Compile and tune for armv7-a instead of armv5Adam Ford1-7/+0
arch/arm/Makefile references armv5 for backwards compatibility with older compilers. This patch removes those references to armv5, since by now newer compilers are required which should have armv7 support enabled. The Makefile also also has a list of options for mtune, but the entry for CONFIG_CPU_V7A is empty, so this patch tunes the CPU_V7A architecture to generic-armv7-a. The following size changed apply to omap3_logic using GCC. Stock text data bss dec hex filename 50910 429 67580 118919 1d087 spl/u-boot-spl 540713 22700 327072 890485 d9675 u-boot Without Armv5 text data bss dec hex filename 50916 429 67580 118925 1d08d spl/u-boot-spl 540719 22700 327064 890483 d9673 u-boot mtune=generic-armv7-a text data bss dec hex filename 50932 429 67580 118941 1d09d spl/u-boot-spl 540519 22700 327080 890299 d95bb u-boot Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-20Merge git://git.denx.de/u-boot-x86Tom Rini1-22/+0
2018-08-20doc: FIT image: fix typoPierre-Jean Texier1-1/+1
Fix typo in beaglebone verified boot documentation. Signed-off-by: Pierre-Jean Texier <texier.pj2@gmail.com>
2018-08-20x86: dts: Remove coreboot_fb.dtsiBin Meng1-7/+0
There is no need to keep a separate coreboot_fb.dtsi since now we have a generic coreboot payload dts. While we are here, this also remove the out-of-date description in the documentation regarding to coreboot framebuffer driver with U-Boot loaded as a payload from coreboot. As the testing result with QEMU 2.5.0 shows, the driver just works like a charm. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-20x86: coreboot: Add generic coreboot payload supportBin Meng1-15/+0
Currently building U-Boot as the coreboot payload requires user to change the build configuration for a specific board during menuconfig process. This uses the board's native device tree to configure the hardware. For example, the device tree provides PCI address range for the PCI host controller and U-Boot will re-program all PCI devices' BAR to be within this range. In order to make sure we don't mess up the hardware, we should guarantee the range matches what coreboot programs the chipset. But we really should make the coreboot payload support easier. Just like EFI payload, we can create a generic coreboot payload for all x86 boards as well. The payload is configured to include as many generic drivers as possible. All stuff that touches low level initialization are not allowed as such is the coreboot's responsibility. Platform specific drivers (like gpio, spi, etc) are not included. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-08-19drivers: regulator: fixed: add u-boot, off-on-delay-usPeng Fan1-0/+1
Add u-boot,off-on-delay-us for fixed regulator. Depends on board design, the gpio regulator sometimes connects with a big capacitance. When need to off, then on the regulator, if there is no enough delay, the voltage does not drop to 0, so introduce this property to handle such case. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-10doc: FIT image: clarify usage of "compression" propertySimon Goldschmidt1-1/+3
Compressed images should have their compression property set to "none" if U-Boot should leave them compressed. This is especially the case for compressed ramdisks that should be uncompressed by the kernel only. Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-08-10doc: README.iscsi: make compatible with restructured textHeinrich Schuchardt1-62/+68
The Sphinx documentation system uses restructured text. Make the README.iscsi file compatible. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini1-3/+8
2018-08-08usb: rockchip: implement K_FW_LBA_ERASE_10 commandAlberto Panizzo1-0/+1
This command is part of the write partition sequence performed by rkdeveloptool: one partition is first completely erased and than wrote. Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08usb: rockchip: implement K_FW_LBA_READ_10 commandAlberto Panizzo1-0/+1
This patch implement reading blocks form selected device with LBA addressing. Corresponding command on workstation is: rkdeveloptool rl <start_blk> <blk_cnt> <file> While we support reading more than one blocks per K_FW_LBA_READ_10 request, rkdeveloptool and original rockchip tool do perform chunk reads limiting the maximum size per chunk far lower than max int values. Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER commandAlberto Panizzo1-3/+6
Chip Version is a string saved in BOOTROM address space Little Endian. Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030 which brings: 320A20140813V200 Note that memory version do invert MSB/LSB so printing the char buffer would show: A02341023180002V Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08pci: sandbox: Support dynamically binding device driverBin Meng1-0/+28
At present all emulated sandbox pci devices must be present in the device tree in order to be used. The real world pci uclass driver supports pci device driver matching, and we should add such support on sandbox too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03dt-bindings: Document STM32 ADC DT bindingsFabrice Gasnier1-0/+141
This patch adds documentation of device tree bindings for the STM32 ADC. It's based on linux-v4.18-rc* dt-bindings, at the time of writing: - Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-31 07:27:26 +0000