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2008-08-21fdt: rework fdt_fixup_ethernet() to use env instead of bd_tKumar Gala1-1/+1
Move to using the environment variables 'ethaddr', 'eth1addr', etc.. instead of bd->bi_enetaddr, bi_enet1addr, etc. This makes the code a bit more flexible to the number of ethernet interfaces. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-13Merge branch 'Makefile' of git://git.denx.de/u-boot-armWolfgang Denk1-1/+1
2008-08-13Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese1-64/+48
2008-08-13drivers/mtd/nand: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD1-1/+1
rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-12NAND: Update 4xx NDFC driver to match updated nand subsystemStefan Roese1-42/+41
This patch changes the 4xx NAND driver ndfc.c to match the new infrastructure from the updated NAND subsystem. This NAND subsystem was recently synced again with the Linux 2.6.22 MTD/NAND subsystem. Tested successfully on AMCC Sequoia and Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-12Fixing coding style issuesWilliam Juul1-7/+7
- Fixing leading white spaces - Fixing indentation where 4 spaces are used instead of tab - Removing C++ comments (//), wherever I introduced them Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12Update MTD to that of Linux 2.6.22.1William Juul1-36/+21
A lot changed in the Linux MTD code, since it was last ported from Linux to U-Boot. This patch takes U-Boot NAND support to the level of Linux 2.6.22.1 and will enable support for very large NAND devices (4KB pages) and ease the compatibility between U-Boot and Linux filesystems. This patch is tested on two custom boards with PPC and ARM processors running YAFFS in U-Boot and Linux using gcc-4.1.2 cross compilers. MAKEALL ppc/arm has some issues: * DOC/OneNand/nand_spl is not building (I have not tried porting these parts, and since I do not have any HW and I am not familiar with this code/HW I think its best left to someone else.) Except for the issues mentioned above, I have ported all drivers necessary to run MAKEALL ppc/arm without errors and warnings. Many drivers were trivial to port, but some were not so trivial. The following drivers must be examined carefully and maybe rewritten to some degree: cpu/ppc4xx/ndfc.c cpu/arm926ejs/davinci/nand.c board/delta/nand.c board/zylonite/nand.c Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Stig Olsen <stig.olsen@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-06Fix merge problemsStefan Roese1-12/+12
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18ppc4xx: Fix incorrect MODTx setup for some DIMM configurationsStefan Roese1-12/+12
This patch fixes a problem with incorrect MODTx (On Die Termination) setup for a configuration with multiple DIMM's and multiple ranks. Without this change Katmai was unable to boot Linux with DDR2 frequency >= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux with DDR2 frequency = 640MHz and mem=4GB. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 supportStefan Roese2-36/+7
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18ppc4xx: CPU PPC440x5 on Virtex5 FXRicardo Ribalda Delgado6-153/+361
-This patchs gives support for the embbedded ppc440 on the Virtex5 FPGAs -interrupts.c divided in uic.c and interrupts.c -xilinx_irq.c for xilinx interrupt controller -Include modifications propossed by Stefan Roese Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Acked-by: Stefan Roese <sr@denx.de>
2008-07-17Merge branch 'master' of /home/stefan/git/u-boot/u-boot into nextStefan Roese1-3/+3
2008-07-14Code cleanup: fix old style assignment ambiguities like "=-" etc.Wolfgang Denk1-3/+3
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14Merge branch 'master' of /home/stefan/git/u-boot/u-boot into nextStefan Roese1-3/+3
2008-07-13ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boardsStefan Roese1-2/+10
This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Fix include sequence in 4xx_pcie.cStefan Roese1-3/+3
This patch now moves common.h to the top of the inlcude list. This is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that the phys_size_t/phys_addr_t are defined to the correct size in this driver. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Fix compile warning in 44x_spd_ddr2.cStefan Roese1-2/+2
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Rework 440GX UIC handlingStefan Roese3-85/+36
This patch reworks the 440GX interrupt handling so that the common 4xx code can be used. The 440GX is an exception to all other 4xx variants by having the cascading interrupt vectors not on UIC0 but on a special UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt handling is simpler without any 440GX special cases. Also some additional cleanup to cpu/ppc4xx/interrupt.c is done. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Consolidate PPC4xx UIC definesStefan Roese3-328/+157
This 2nd patch now removes all UIC mask bit definition. They should be generated from the vectors by using the UIC_MASK() macro from now on. This way only the vectors need to get defined for new PPC's. Also only the really used interrupt vectors are now defined. This makes definitions for new PPC versions easier and less error prone. Another part of this patch is that the 4xx emac driver got a little cleanup, since now the usage of the interrupts is clearer. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Consolidate PPC4xx UIC definesStefan Roese5-5/+2
This patch is the first step to consolidate the UIC related defines in the 4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next steps. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boardsStefan Roese1-2/+10
This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Fix merge problems in 44x_spd_ddr2.cStefan Roese1-16/+19
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Add MII mode support to the EMAC RGMII BridgeGrant Erickson1-11/+69
This patch adds support for placing the RGMII bridge on the PPC405EX(r) into MII/GMII mode and allows a board-specific configuration to specify the bridge mode at compile-time. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM ControllerGrant Erickson1-165/+97
This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM controller registers (MODT and INITPLR) used by the PowerPC405EX(r). The MMODE and MEMODE registers are unified with their peer values used for the INITPLR MR and EMR registers, respectively. Finally, a spelling typo is correct (MANUEL to MANUAL). With these mnemonics in place, the CFG_SDRAM0_* magic numbers for Kilauea are replaced by equivalent mnemonics to make it easier to compare and contrast other 405EX(r)-based boards (e.g. during board bring-up). Finally, unified the SDRAM controller register dump routine such that it can be used across all processor variants that utilize the IBM DDR2 SDRAM controller core. It produces output of the form: PPC4xx IBM DDR2 Register Dump: ... SDRAM_MB0CF[40] = 0x00006701 ... which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included since it is not uncommon that the DCR values in header files get mixed up and it helps to validate, at a glance, they match what is printed in the user manual. Tested on: AMCC Kilauea/Haleakala: - NFS Linux Boot: PASSED - NAND Linux Boot: PASSED Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Add initial 460SX defines for the cpu/ppc4xx directory.Feng Kan4-4/+54
Signed-off-by: Feng Kan <fkan@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10ppc4xx: Fix printf format warnings now visible with the updated format checkStefan Roese5-25/+25
This patch fixes ppc4xx related printf format warning. Those warnings are now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is really helpful. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10ppc4xx: Enable support for > 2GB SDRAM on AMCC KatmaiStefan Roese1-11/+45
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM. To support such configurations, we "only" map the first 2GB via the TLB's. We need some free virtual address space for the remaining peripherals like, SoC devices, FLASH etc. Note that ECC is currently not supported on configurations with more than 2GB SDRAM. This is because we only map the first 2GB on such systems, and therefore the ECC parity byte of the remaining area can't be written. Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-07Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese1-1/+1
2008-07-06ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405Michal Simek1-1/+1
This change helps with better handling with others Xilinx based platform. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stefan Roese <sr@denx.de>
2008-07-01ppc4xx: Fix 460EX/GT PCIe port initializationStefan Roese1-7/+5
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing this out. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-30ppc4xx: Fix 460EX errata with CPU lockup upon high AHB trafficStefan Roese1-2/+18
This patch implements a fix provided by AMCC so that the lockup upon simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur anymore: Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA. This errata is not officially available yet. I'll update the comment to add the errata number later. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-23ppc4xx: Fix problem in gpio_config()Stefan Roese1-2/+2
As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted left by one. So the additional shift is bogus. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-12Change initdram() return type to phys_size_tBecky Bruce3-5/+5
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-06ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config optionsStefan Roese1-5/+5
We use upper case letters for the AMCC processor defines (like CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and not CONFIG_440SPe. This patch fixes the last misspelled config options. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Remove superfluous dram_init() call or replace it by initdram()Stefan Roese2-8/+8
Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC codeStefan Roese1-2/+3
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Fix common ECC generation code for 440GP style platformsStefan Roese2-7/+34
This patch makes the common 4xx ECC code really usable on 440GP style platforms. Since the IBM DDR controller used on 440GP/GX/EP/GR is not register compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT we need to make some processor dependant defines used later on by the driver. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Change Kilauea to use the common DDR2 init functionStefan Roese1-0/+11
This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1Stefan Roese1-151/+0
This patch removes all SDRAM related defines from the PPC4xx headers ppc405.h and ppc440.h. This is needed since now some 405 PPC's use the same SDRAM controller as 440 systems do (like 405EX and 440SP). It also introduces new defines for the equipped SDRAM controller based on which PPC variant is used. There new defines are: used on 405GR/CR/EP and some Xilinx Virtex boards. used on 440GP/GX/EP/GR. used on 440EPx/GRx. used on 405EX/r/440SP/SPe/460EX/GT. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.SStefan Roese1-126/+80
This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
2008-06-03ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson9-259/+526
This patch (Part 1 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03PPC4xx: Simplified post_word_{load, store}Grant Erickson1-15/+11
This patch simplifies post_word_{load,store} by using the preprocessor to eliminate redundant, copy-and-pasted code. Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-05-21Big white-space cleanup.Wolfgang Denk7-36/+36
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-13ppc4xx: Add 405EX(r) revision C PVR definitions and detection codeStefan Roese1-0/+20
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08ppc4xx: Add weak default ft_board_setup() routineStefan Roese1-3/+23
This patch adds a default ft_board_setup() routine to the 4xx fdt code. This routine is defined as weak and can be overwritten by a board specific one if needed. Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08ppc4xx: Fix typos in 460GT/EX FBDV arrayDave Mitchell1-1/+1
Corrected two typos in the 460GT/EX FBDV array. Signed-off-by: Dave Mitchell <dmitchell@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30ppc4xx: Fix problem with DIMMs with 8 banks in 44x_spd_ddr2.cStefan Roese1-2/+5
This patch fixes a problem with DIMMs that have 8 banks. Now the MCIF0_MBxCF register will be setup correctly for this setup too. This was noticed with the 512MB DIMM on Canyonlands/Glacier. Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29ppc4xx: Fix compilation warning in denali_spd_ddr2.cStefan Roese1-0/+1
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29ppc4xx: Complete remove bogus dflush()Stefan Roese3-33/+5
Since the current dflush() implementation is know to have some problems (as seem on lwmon5 ECC init) this patch removes it completely and replaces it by using clean_dcache_range(). Tested on Katmai with ECC DIMM. Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29ppc4xx: Fixup ebc clock in FDT for 405GP/EPMarkus Brunner1-2/+8
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc doesn't exist. Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
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