| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2010-04-13 | ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU | Peter Tyser | 1 | -297/+0 |
| 2010-04-07 | fsl-ddr: change the default burst mode for DDR3 | Dave Liu | 1 | -4/+10 |
| 2010-01-05 | fsl-ddr: add the override for write leveling | Dave Liu | 1 | -0/+1 |
| 2009-11-12 | fsl-ddr: Fix the chip-select interleaving issue | Dave Liu | 1 | -4/+3 |
| 2009-03-30 | fsl-ddr: add the DDR3 SPD infrastructure | Dave Liu | 1 | -5/+23 |
| 2009-02-16 | fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller | Kumar Gala | 1 | -0/+4 |
| 2009-01-23 | fsl-ddr: use the 1T timing as default configuration | Dave Liu | 1 | -1/+1 |
| 2008-12-03 | fsl ddr skip interleaving if not supported. | Ed Swarthout | 1 | -10/+10 |
| 2008-10-18 | Check DDR interleaving mode | Haiying Wang | 1 | -5/+75 |
| 2008-10-18 | Pass dimm parameters to populate populate controller options | Haiying Wang | 1 | -1/+3 |
| 2008-08-27 | FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. | Kumar Gala | 1 | -0/+197 |
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index : rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git | |
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