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2024-03-14rockchip: Migrate to use DM_USB_GADGET on RK3328Jonas Karlman1-7/+0
USB gadget is not working fully as expected on RK3328, it uses a board_usb_init() function to initialize the DWC2 OTG port. The board_usb_init() function does not intgrate with the generic phy framework and as a result the USB phy is not properly configured before or after USB gadget use. Having both USB_DWC2 and DWC2_OTG enabled for the same board is also causing some issues. Trying to use rockusb or ums command after usb stop result in a freeze due to usb stop is putting the phy in a suspended state. => usb start => usb stop => ums 0 mmc 0 --> freeze due to usb phy is suspended <-- Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral) depending on the most likely usage of the otg port and by migrating to use DM_USB_GADGET instead of a board_usb_init() function. The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a Type-C connector, mark these boards dr_mode as peripheral, the most likely usage is for recovery and image download. The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG driver from these boards to ensure that the USB_DWC2 driver is used. The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2 and DWC2_OTG is removed from this board. Enable RockUSB and UMS on all boards with a otg port in peripheral mode. Also with the migration to DM_USB_GADGET completed the U-Boot specific change to reorder usb nodes in the soc device tree can be reverted. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14rockchip: Use common bss and stack addresses on RK3328Jonas Karlman1-17/+0
With the stack and text base used by U-Boot SPL and proper on RK3328 there is a high likelihood of overlapping when U-Boot proper + FDT nears or exceeded 1 MiB in size. Currently the following memory layout is typically used on RK3328: [ 0, 256K) - SPL binary [ 256K, 2M) - TF-A / reserved [ 2M, +X) - U-Boot proper binary (TEXT_BASE) [ -X, 3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR) [ -8K, 3M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN) [ -X, 4M) - SPL pre-reloc stack (SPL_STACK) [ -8K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) [ 32M, +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE) SPL can safely load U-Boot proper + FDT to [2M, 4M-8K) with this layout. However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is restricting the safe size of U-Boot proper + FDT to be less than 1 MiB. Migrate to use common bss, stack and malloc heap size and addresses to fix this restriction and allow for a larger U-Boot proper image size. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14rockchip: rk3328: regenerate defconfigsChen-Yu Tsai1-3/+0
Regenerate RK3328 defconfigs after adding imply statements. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-14rockchip: rk3328-rock-pi-e: Update defconfigJonas Karlman1-7/+10
Update defconfig for rk3328-rock-pi-e with new defaults. Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt. Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands. Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add DM_MDIO=y to ensure device tree props can be used by PHY driver. Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used. Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator. Also add myself as a reviewer for this board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEKJonas Karlman1-0/+2
Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY during probe. Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E: => mdio list ethernet@ff540000: 1 - RealTek RTL8211F <--> ethernet@ff540000 => net list eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8 => dhcp Speed: 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 DHCP client bound to address 192.168.1.114 (1004 ms) Reported-by: Trevor Woerner <twoerner@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-07configs: Resync with savedefconfigTom Rini1-2/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-31configs: rockchip: Enable USB2PHY for RK3328 boardsJagan Teki1-0/+1
Enable USB2PHY for all RK3328 boards. => usb start starting USB... Bus usb@ff5c0000: USB EHCI 1.00 Bus usb@ff5d0000: USB OHCI 1.0 Bus usb@ff600000: generic_phy_get_bulk : no phys property Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@ff580000: USB DWC2 scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found scanning bus usb@ff600000 for devices... 2 USB Device(s) found scanning bus usb@ff580000 for devices... 2 USB Device(s) found scanning usb for storage devices... 2 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Mass Storage (480 Mb/s, 500mA) TS-RDF5A Transcend 000000000009 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 224mA) SanDisk Dual Drive 040130e3ee554b7078843f4eb331646 1 Hub (480 Mb/s, 0mA) | U-Boot Root Hub | +-2 Human Interface (12 Mb/s, 98mA) Logitech USB Receiver => dm tree -s Class Index Probed Driver Name ----------------------------------------------------------- syscon 1 [ + ] syscon |-- syscon@ff450000 phy 0 [ + ] rockchip_usb2phy | `-- usb2phy@100 clk 2 [ + ] rockchip_usb2phy_clo | |-- usb480m_phy phy 1 [ + ] rockchip_usb2phy_por | |-- otg-port phy 2 [ + ] rockchip_usb2phy_por | `-- host-port sysinfo 0 [ + ] sysinfo_smbios |-- smbios usb 3 [ + ] dwc2_usb |-- usb@ff580000 usb_hub 3 [ + ] usb_hub | `-- usb_hub usb_dev_ge 0 [ + ] usb_dev_generic_drv | `-- generic_bus_3_dev_2 usb 0 [ + ] ehci_generic |-- usb@ff5c0000 usb_hub 0 [ + ] usb_hub | `-- usb_hub usb_mass_s 0 [ + ] usb_mass_storage | `-- usb_mass_storage blk 2 [ + ] usb_storage_blk | |-- usb_mass_storage.lun0 partition 4 [ + ] blk_partition | | |-- usb_mass_storage.lun0:1 partition 5 [ + ] blk_partition | | `-- usb_mass_storage.lun0:2 bootdev 3 [ ] usb_bootdev | `-- usb_mass_storage.lun0.bootdev usb 1 [ + ] ohci_generic `-- usb@ff5d0000 usb_hub 1 [ + ] usb_hub `-- usb_hub Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31configs: Enable DWC3 USB 3.0 on RK3328 boardsJagan Teki1-0/+2
Enable USB 3.0 in all RK3328 boards. => usb start starting USB... Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19) Port not available. Bus usb@ff5d0000: USB OHCI 1.0 Bus usb@ff600000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@ff580000: 1 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 224mA) SanDisk Dual Drive 040130e3ee554b7078843f4eb331646 1 Hub (480 Mb/s, 0mA) U-Boot Root Hub Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31configs: Drop unused XHCI_DWC3 for RK3328 boardsJagan Teki1-1/+0
Driver support for rk3328 is not supported so drop this unused XHCI_DWC3. Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31configs: rockchip: drop useless DEBUG_UART_SKIP_INITPegorer Massimo1-1/+0
DEBUG_UART_SKIP_INIT feature is implemented only by s5p (DEBUG_UART_S5P) and pl01x (DEBUG_UART_PL010 or DEBUG_UART_PL011) serial drivers, but all ARCH_ROCKCHIP configs rely on default DEBUG_UART_NS16550. The ns16550 serial driver does not depends on DEBUG_UART_SKIP_INIT, so drop it from rockchip configs. Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-01configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17configs: Resync with savedefconfigTom Rini1-5/+5
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05Convert CONFIG_SYS_NS16550_MEM32 et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SPL_NS16550_MIN_FUNCTIONS CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that platforms can enable the legacy driver here for SPL. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-03usb: ohci: Use a flexible array member for portstatusSamuel Holland1-1/+0
The struct is only used to overlay the MMIO region, so the behavior is the same. This obsoletes the Kconfig option for the number of ports. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass1-1/+1
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29configs: rockchip: Drop TPL_MAX_SIZE definitionMichael Trimarchi1-1/+0
The max size is defined at architectural level. On the same commit I have checked mostly all the other architecture and look like they are Fixes: commit ca8a329a1b7f ("Convert CONFIG_SPL_PAD_TO et al to Kconfig") Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-23configs: Resync with savedefconfigTom Rini1-1/+0
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25configs: Resync with savedefconfigTom Rini1-1/+1
Resync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07Convert CONFIG_USB_OHCI_NEW et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06configs: Resync with savedefconfigWIP/06Jun2022-nextTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_BSS_START_ADDR to KconfigTom Rini1-0/+2
This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_STACK to KconfigTom Rini1-0/+2
This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.hTom Rini1-0/+2
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_BSS_MAX_SIZE et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06Convert CONFIG_SPL_PAD_TO et al to KconfigTom Rini1-0/+3
This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-21configs: set CONFIG_COUNTER_FREQUENCYPeng Fan1-0/+1
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in config header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> [trini: Re-run migration]
2022-04-08configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04power: Tidy up #undef of CONFIG_DM_PMICSimon Glass1-0/+1
Add a proper Kconfig option for SPL so we can remove the hack in some of the board config files. This involves adding CONFIG_SPL_DM_PMIC to some of the configs as well as updateing the Makefile rule for PMIC_RK8XX to exclude SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: Add SPL_PMIC_RK8XX, enable when needed, handle undef of CONFIG_DM_PMIC_PFUZE100 as well] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31Convert CONFIG_SKIP_LOWLEVEL_INIT et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31Convert CONFIG_SYS_LOAD_ADDR to KconfigTom Rini1-0/+1
Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISCSimon Glass1-2/+2
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_POWER_SUPPORT to SPL_POWERSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-06-28configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-09configs: Resync with savedefconfigTom Rini1-2/+2
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-11-06rockchip: Use devicetree for SMBIOS settingsSimon Glass1-2/+2
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-09configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10configs: Resync with savedefconfigv2020.10-rc2Tom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-08Convert CONFIG_SYS_MMC_ENV_DEV et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_SYS_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_PART Note that with this conversion we now have consistent behavior with respect to ensuring that we have always selected the correct MMC device and hardware partition. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28configs: Resync with savedefconfigTom Rini1-1/+1
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-23configs: Resync with savedefconfigTom Rini1-2/+2
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-07rockchip: rk3328: add rock-pi-e-rk3328_defconfig fileb.l.huang1-0/+104
This commit add the default configuration file and relevant description for rock-pi-e board Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
generated by cgit v1.1 at 2024-08-13 20:53:34 +0000