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2018-10-29Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini3-16/+64
2018-10-29sunxi: store DRAM size in SPL headerAndre Przywara1-1/+27
At the moment we rely on the infamous get_ram_size() function to learn the actual DRAM size in U-Boot proper. This function has two issues: 1) It only works if the DRAM size is a power of two. We start to see boards which have 3GB of (usable) DRAM, so this does not fit anymore. 2) As U-Boot has no notion of reserved memory so far, it will happily ride through the DRAM, possibly stepping on secure-only memory. This could be a region of DRAM reserved for OP-TEE or some other secure payload, for instance. It will most likely crash in that case. As the SPL DRAM init routine has very accurate knowledge of the actual DRAM size, lets propagate this wisdom to U-Boot proper. We re-purpose a currently reserved word in our SPL header for that. The SPL itself stores the detected DRAM size there, and bumps the SPL header version number in that case. U-Boot proper checks for a valid SPL header and a high enough version number, then uses the DRAM size from there. If the SPL header field is not sufficient, we fall back to the old DRAM scanning routine. Part of the DRAM might be present and probed by SPL, but not accessible by the CPU. They're restricted in the main U-Boot binary, when accessing the DRAM size from SPL header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: board.c: refactor SPL header checksAndre Przywara1-11/+30
So far we have two users which want to look at the SPL header. We will get more in the future. Refactor the existing SPL header checks into a common function, to simplify reusing the code. Now that this is easy, add proper version checks to the DT name parsing. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: Extend SPL header versioningAndre Przywara1-2/+2
On Allwinner SoCs we use some free bytes at the beginning of the SPL image to store various information. We have a version byte to allow updates, but changing this always requires all tools to be updated as well. Introduce the concept of semantic versioning [1] to the SPL header: The major part of the version number only changes on incompatible updates, a minor number bump indicates backward compatibility. This patch just documents the major/minor split, adds some comments to the header file and uses the versioning information for the existing users. [1] https://semver.org Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: disable Pine A64 model detection code on other boardsIcenowy Zheng1-0/+3
The Pine A64 Plus/non-Plus model detection code is now built on all 64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in use. Disable them when the board is Pine A64 by adding a Kconfig option that is only selected on Pine A64. On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and saves a 104 byte strstr() function, then makes SPL on H6 succeed to build. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-25Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini17-19/+1046
Merged imx8 architecture, fix build for imx8 + warnings
2018-10-24sunxi: docs: Mention CONFIG_NAND requirementPriit Laes1-3/+3
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24sunxi: Fix typos of spelling AllwinnerPriit Laes1-1/+1
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfigFabio Estevam1-0/+1
Add an entry for the warp7_bl33_defconfig target. This fixes the following warnings: WARNING: no status info for 'warp7_bl33' WARNING: no maintainers for 'warp7_bl33' Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
2018-10-23ARM: Samsung: Add Exynos5422-based Odroid HC2 supportDirk Meul2-5/+15
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1. The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used for the Odroid HC2. Resend because MUA changed whitespace. Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-10-22ARM: omap3_logic: Add NOR Flash Support for SOM-LVAdam Ford1-1/+48
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR flash part connected to CS2 in addition to the NAND part on CS0. This patch setups the GPMC timings for the MT28 NOR Flash and enables the CFI-Flash driver now that the CFI stuff is in Kconfig Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22board: at91sam9x5: add environment var for cpu typeEugen Hristev2-0/+11
When booting and CPU is detected from cpuid, we also need an environment variable that will be used in boot commands to load the proper devicetree. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22ARM: omap3logic: Fix MMC nameAdam Ford1-1/+1
In my haste to migrate SPL to DM, I copied the wrong name. While it really doesn't matter, I'd prefer the name to match the board, so am335x_mmc0 is now called omap3_logic_mmc0 Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3logic: Specify DM serial driver as omap_serialAdam Ford1-1/+1
With the new omap_serial driver, this patch uses this instead from the former ns16550_serial driver. Even though the omap_serial driver is essentially the same. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3logic: Encapsulate the MUSB functions in check for DMAdam Ford1-2/+4
With the DM_USB working for USB host features, encapsulate the USB gadget initialization in a precomiler check. If DM is enabled, we don't need to manually initialize the MUSB driver. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3_logic.c: Optimize DDR timings based on OMAP35 or 36/37Adam Ford1-5/+15
The default timings are assumming an OMAP36 / AM37 / DM37, but the OMAP35 controller is a bit slower, so DDR may operate out of spec when under stress. This patch checks the processor type and sets the DDR timings according to processor type. Fixes: 5ad4212ce0d5 ("ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo") Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22board: ge: bx50v3: fix initialization of i2c bus0Dan Cimpoca1-3/+3
I2C bus 0 was not initialized correctly. There is an offset between i2c index and the structure number of pad info. So i2c bus 0 can be in an inconsistent state. This problem become visible on B{4,6}50v3 with the CPUC HW watchdog enabled. Sometimes when the CPUC HW watchdog interrupted the boot process, U-Boot was not able to read VPD from I2C/EEPROM and the system failed to boot up again, because a device connected to that bus was stuck in data transfer state (from previous boot attempt) and there was no method to recover (struct mxc_i2c_bus::idle_bus_fn was not set) courtesy of incorrect initialization. Signed-off-by: Dan Cimpoca <dan.I.cimpoca@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: b{4,6}50v3 modelineIan Ray1-0/+2
The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise the LVDS panel shows garbage. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: correct LDB clockIan Ray1-13/+17
Use Video PLL to provide 65MHz for all displays. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: Change maintainerFabien Lahoudere1-1/+1
While using ./scripts/get_maintainer.pl I detect that the Maintainer name and address for bx50v3 boards are not valid. The new maintainer for GE bx50v3 products must be Ian Ray. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22imx: imx8qxp_mek: update to build image in U-BootPeng Fan2-29/+37
Update README Add imximage.cfg Update defconfig to include imximage.cfg Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-22imx: add i.MX8QXP MEK board supportPeng Fan6-0/+350
Add i.MX8QXP MEK board support Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver. Added README file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-10-19arm: lpc32xx: add CONFIG_ARCH_LPC32XX build optionVladimir Zapolskiy2-6/+0
The explicit arch specific build symbol allows to group supported boards, generalize common config options and it will serve as a dependency for platform only drivers. Two related board defconfigs are resynced after the change. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-10-18ARM: rmobile: Fix module clock controls refer status on Gen3Hiroyuki Yokoyama3-6/+6
When referring to the MSTPSR register, it contains the clock status of SYS, RT, SECURE, and controlling SMSTPCR using this value has the problem of being affected by the RT and SECURE status.This patch changes the reference register to SMSTPCR. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3Hiroyuki Yokoyama3-18/+0
Tidy up unused definition related to power control of 3DG. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: salvator-x: Remove GSX clock force supplyHiroyuki Yokoyama1-12/+0
GSX clock force supply code is unnecessary at U-Boot, because GSX clock control is supported at the kernel driver. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Remove Watchdog and CPG settings on Gen3Hiroyuki Yokoyama3-39/+0
This code is unnecessary, because these registers are set by the initial program loader (IPL). Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Remove TMU0/TMU1 settings on Gen3Hiroyuki Yokoyama5-25/+0
U-Boot uses ARM generic timer, TMU0 and TMU1 are not used, remove them. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3Hiroyuki Yokoyama3-6/+6
This patch fixes the write-protect control of CPG. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-16arm64: zynqmp: Add new command for TCM initializationSiva Durga Prasad Paladugu1-1/+36
This patch adds new zynqmp command "zynqmp tcminit mode" to initialize TCM. TCM needs to be initialized before accessing to avoid ECC errors. This new command helps to perform the same. It also makes tcm_init() as global and uses it for doing the TCM initialization. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: versal: Add support for new Xilinx Versal ACAPsMichal Simek3-0/+95
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: zynq: Add support for DLC20 boardMichal Simek1-0/+280
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: mx5: Add M53Menlo boardMarek Vasut5-0/+635
Add Menlosystems M53 board, based on the M53 SoM. This board has Ethernet, USB host, USB gadget, UART and LCD on it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2018-10-15Merge tag 'arc-more-updates-for-2018.11-rc2-2' of git://git.denx.de/u-boot-arcTom Rini4-5/+67
More fixes and improvements for ARC here: Fixes (this time included for real): * Take care of global uninitialized variables They used to be put right after .bss section and were never zeroed as they should be. Now merged with normal .bss Improvements: * Print more verbose CPU info for boards built on real silicon * Add support for SD-card detection on all ARC boards * Quite a few fixes for IoT DK - Support reset by command - Print of CPU freq on boot - Link for eFlash etc
2018-10-12Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-0/+27
2018-10-12axs10x/emdk/hsdk/iot_dk: Implement board_mmc_getcd()Alexey Brodkin4-0/+28
So now we may detect MMC/SD-card existence and instead of completely misleading message on missing card: ------------------------>8----------------------- Loading Environment from FAT... Card did not respond to voltage select! ------------------------>8----------------------- we now get very clear one: ------------------------>8----------------------- Loading Environment from FAT... MMC: no card present ------------------------>8----------------------- Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12iot_dk: Save CPU clock value to gd->cpu_clkAlexey Brodkin1-6/+8
Since gd->cpu_clk is a global item we may once populate it from .dtb ans use it then in other places like for printing CPU info etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12iot_dk: Add support of 136 MHz clockAlexey Brodkin1-0/+8
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12iot_dk: Implement board resetAlexey Brodkin1-0/+8
It is done by writing some magic sequence in a special register. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12iot_dk/hsdk: Implement its own print_cpuinfo()Alexey Brodkin2-0/+16
ARC IDENTITY register only encodes major architecture type and version while for a particular board/silicon we may know better which template was used and so we may identify CPU more precise, which exactly we do here. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-11Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini5-45/+45
2018-10-10driver: net: fsl-mc: Add support of multiple phys for dpmacPankaj Bansal4-44/+45
Till now we have had cases where we had one phy device per dpmac. Now, with the upcoming products (LX2160AQDS), we have cases, where there are sometimes two phy devices for one dpmac. One phy for TX lanes and one phy for RX lanes. to handle such cases, add the support for multiple phys in ethernet driver. The ethernet link is up if all the phy devices connected to one dpmac report link up. also the link capabilities are limited by the weakest phy device. i.e. say if there are two phys for one dpmac. one operates at 10G without autoneg and other operate at 1G with autoneg. Then the ethernet interface will operate at 1G without autoneg. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dmTom Rini1-1/+4
Test improvements to tidy up output and drop duplicate tests Sandbox SPL/TPL support Various dm-related improvements
2018-10-10arm: remove prototype for get_timer_maskedPatrick Delaunay1-22/+23
The interruption support had be removed for ARM architecture and the function get_timer_masked() is no more used except in some the timer.c files. This patch clean each timer.c which implement this function and remove the associated prototype in u-boot-arm.h For timer.c, I don't verify if the weak version of get_timer (in lib/time.c) can be used Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: remove prototype for udelay_maskedPatrick Delaunay1-6/+0
The interruption support had be removed for ARM architecture and the function udelay_masked() is no more used except in some timer.c files and have the same content than udelay() or __udelay(). This patch update each timer.c implementing this function and remove the associated prototype in u-boot-arm.h. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10gpio: da8xx: Push generic defines of gpio.h out of mach-davinciKeerthy1-0/+1
Push generic defines of gpio.h out of mach-davinci to drivers/gpio now that non-davinci architectures are beginning to use this IP. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Fix calimain build] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-10board: ks2: move uinitrd fixup logic inside ft_board_setup_exNicholas Faustini1-22/+22
The uinitrd fixup logic should be executed after the FDT /chosen node has been properly populated by fdt_initrd() Signed-off-by: Nicholas Faustini <nicholas.faustini@azcomtech.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-10-10ARM: meson: Add Khadas VIM2 board supportLoic Devulder5-0/+189
This adds platform code for the Khadas VIM2 board based on a Meson GXM (S912) SoC with the Meson GXM configuration. This initial submission supports UART, MMC/SDCard and Ethernet. USB is partially supported. All the code is from Neil Armstrong! I just rebased the code, do some cleanup and tested on my board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Loic Devulder <ldevulder@suse.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-10net.h: Include linux/if_ether.h to avoid duplicationBin Meng1-1/+0
There are plenty of existing drivers that have macros like ETH_ALEN defined in their own source files. Now that we imported the kernel's if_ether.h to U-Boot we can reduce some duplication. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10board: da8xxevm: Add SPL DM for serial, spiJagan Teki1-0/+27
This patch add SPL DM support for da8xxevm boards with SPL serial, SPI drivers supported via platdata. Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm
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