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2017-12-11ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000HzEugeniy Paltsev1-1/+11
DW SDIO controller has external CIU clock divider controlled via register in the SDIO IP. Due to its unexpected default value (we expected it to divide by 1 but in reality it divides by 8) SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual is 12500000Hz) and works unstable (see STAR 9001204800). So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-08Merge git://git.denx.de/u-boot-mpc85xxTom Rini22-29/+29
2017-12-08rockchip: rk3399-puma: preserve leading zeros in serial#Jakob Unterwurzacher1-1/+1
Linux preserves leading zeros in /proc/cpuinfo, so we should as well. Otherwise we have the situation that /sys/firmware/devicetree/base/serial-number and /proc/cpuinfo disagree in Linux. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-06armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal1-0/+12
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal2-3/+5
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar1-0/+29
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06powerpc: mpc85xx: Fix static TLB table for SDRAMYork Sun22-29/+29
Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>
2017-12-04Merge git://git.denx.de/u-boot-uniphierTom Rini10-10/+10
2017-12-04ARM: arch-meson: build memory banks using reported memory from registersNeil Armstrong4-0/+32
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04arm: Add Khadas VIM support based on Meson GXL familyNeil Armstrong5-0/+171
This adds platform code for the Khadas VIM board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04arm: Add LibreTech CC support based on Meson GXL familyNeil Armstrong5-0/+175
This adds platform code for the Libre Computer CC "Le Potato" board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04board: p212: use common ethernet init functionNeil Armstrong1-12/+2
Switch P212 Ethernet init to the common Ethernet init function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04board: odroid-c2: use common ethernet init functionNeil Armstrong1-9/+2
Switch Odroid-C2 Ethernet init to the common Ethernet init function. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04add support for Raspberry Pi Zero WDmitry Korunov1-0/+5
Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
2017-12-04mtd: nand: Rename nand.h into rawnand.hMasahiro Yamada10-10/+10
This header was renamed to rawnand.h in Linux. The following is the corresponding commit in Linux. commit d4092d76a4a4e57b65910899948a83cc8646c5a5 Author: Boris Brezillon <boris.brezillon@free-electrons.com> Date: Fri Aug 4 17:29:10 2017 +0200 mtd: nand: Rename nand.h into rawnand.h We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-30rockchip: rk3399-puma: add code to allow forcing a power-on resetPhilipp Tomsich1-0/+44
The reset circuitry in the RK3399 only resets 'almost all logic' when a software reset is performed. To make our software maintenance easier in the future, we want to have the option (controlled by a DTS property) to force all reset causes other than a power-on reset to trigger a power-on reset via a GPIO trigger. This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7) board-support and the documentation for the new property (sysreset-gpio) within the /config-node. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-30rockchip: rk3399-puma: implement usb_hub_reset_devices for puma-rk3399Philipp Tomsich1-1/+69
For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2 are affected), we need to turn on the power for the port connected to the on-module USB hub only when the device is probed for the first time to ensure that the hub does not enter a low-power mode (that U-Boot's USB stack can't deal with). Note that this is needed for U-Boot only, as Linux eventually manages to attach the hub even when it has entered into its low-power state (when the hub wakes up the next time) after a few seconds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
2017-11-30rockchip: board: evb-rk3128: add empty MakefilePhilipp Tomsich2-0/+5
Even if the board-specific directory Makefile doesn't have any targets, it still needs to exist. This adds a minimal Makefile for the board/rockchip/evb_rk3128 directory and a evk-rk3128.c (as built-in.o needs to be built for every directory that a Makefile gets run for). Fixes: c7a6866 ("rockchip: rk3128: add evb-rk3128 support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: rk3128: add evb-rk3128 supportKever Yang2-0/+21
evb-rk3128 is an evb from Rockchip based on rk3128 SoC: - 2 USB2.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30rockchip: board: evb_rv1108: update READMEAndy Yan1-3/+2
After commit d962e5dadc2c("rockchip: mkimage: use spl_boot0 for all Rockchip SoCs"), the mkimage will not pad the Tag memroy, so we shoud pass a Taged ddr.bin/spl.bin to it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini5-159/+137
2017-11-30Merge git://git.denx.de/u-boot-marvellTom Rini5-6/+6
2017-11-30ARM: rmobile: Rework the ULCB CPLD driverMarek Vasut1-94/+118
Rework the ULCB CPLD driver and make it into a sysreset driver, since that is what the ULCB CPLD driver is mostly for. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30arm: mvebu: correct comments around cas_wl/cas_lChris Packham5-6/+6
The order of members in struct hws_topology_map is cas_wl, cas_l. The comments in the original db-88f6820-gp.c had this wrong and have been copied to other Armada-385 based boards. Practically this hasn't made a difference since all these boards set both cas_wl and cas_l to 0 (autodetect) but if there were ever a board that did need to set these explicitly they would run into unexpected issued. Update the comments to reflect the correct order of structure members. Reported-by: Tobi Wulff <tobi.wulff@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-29board: laird: add WB50N CPU moduleBen Whitten4-0/+230
This board is based on the Atmel sama5d3 eval boards. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29board: laird: add WB45N CPU moduleBen Whitten4-0/+223
This board is based on the Atmel 9x5 eval board. Supporting the following features: - Boot from NAND Flash - Ethernet - FIT - SPL Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29board: atmel: add sama5d2_ptc_ek boardLudovic Desroches7-303/+149
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board which was a prototype. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-29mach-stm32: Factorize MPU's region config for STM32 SoCsPatrice Chotard1-0/+2
MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family and used a common MPU's region config. Only one exception for STM32H7 which doesn't have device area located at 0xA000 0000. For STM32F4, configure_clocks() need to be moved from arch_cpu_init() to board_early_init_f(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-29stm32: migrate clock structs in include/stm32_rcc.hPatrice Chotard1-0/+1
In order to factorize code between STM32F4 and STM32F7 migrate all structs related to RCC clocks in include/stm32_rcc.h Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-30nds32: board: Support ftsdc010 DM.Rick Chen1-0/+2
AG101P/AE3XX enable ftsdc010 dm flow. Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30ARM: rmobile: Configure DRAM sizes from DTMarek Vasut2-48/+8
Drop the ad-hoc DRAM configuration with macros and just decode the DRAM configuration from device tree instead. This makes it far cleaner and easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30ARM: rmobile: Zap rmobile_sysinfo on Gen3Marek Vasut2-8/+0
Since checkboard() is gone, rmobile_sysinfo is also pointless on Gen3. Furthermore, nuke ad-hoc CONFIG_RCAR_BOARD_STRING which is also dead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30ARM: rmobile: Drop CPU type ifdef from salvator-xMarek Vasut1-7/+9
We can now use rmobile_get_cpu_type() to check the CPU ID rather than using a macro, make it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30ARM: rmobile: Stop using rcar-common/common.c on Gen3Marek Vasut2-2/+2
Since the Gen3 clock driver now has a .remove callback, it is no longer necessary to shut the clock down before booting Linux in the arch_preboot_os hook. Stop using it and while doing so, remove all the ad-hoc config options which this hook used. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-29Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblazeTom Rini24-2161/+1240
Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
2017-11-29arm: zynq: Add ps7_init for cc108Michal Simek1-0/+815
After some generic cleanup adding ps7_init* to repository is not big pain now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29arm: zynq: Show information about silicon versionMichal Simek1-0/+9
Show information about silicon in bootlog. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29arm: zynq: Convert all board to use arch ps7_init codeMichal Simek12-1629/+6
Use generic implementation. It will also reduce config data size for converted boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29arm: zynq: Move common ps7_init* initialization to arch codeMichal Simek6-155/+4
This patch is based on work done in topic board where the first address word also storing operation which should be done. This is reducing size of configuration data. This patch is not breaking an option to copy default ps7_init_gpl* files from hdf file but it is doing preparation for ps7_init* consolidation. The patch is also marking ps7_config as weak function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29arm: zynq: Get rid of ps7_reset_apu() for syzygy boardMichal Simek1-7/+1
There is no reason to call separate function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29arm: zynq: Remove ps7_debug codeMichal Simek12-578/+0
SPL is not calling this code that's why it is dead code and can be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28Merge git://git.denx.de/u-boot-mipsTom Rini6-6/+19
2017-11-28boston: Add u-boot.mcs make targetPaul Burton1-0/+14
U-Boot is generally flashed to a MIPS Boston development board by means of a .mcs file which Xilinx Vivado software can write to the flash present on the board. As such we'd generally want to produce an mcs file when building U-Boot to target the Boston board. Introduce a make target for u-boot.mcs which generates it using the srec_cat tool available from the SRecord project, and build it by default when srec_cat is present. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de
2017-11-28Update Paul Burton's email addressPaul Burton4-4/+4
MIPS is no longer a part of Imagination Technologies, and as such my @imgtec.com email address will soon cease to function. This patch updates occurrances of it with my new @mips.com email address, and adds an entry in .mailmap such that git (& tools such as get_maintainer.pl when examining history) will use the new address. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de
2017-11-28boston: Remove unused label in lowlevel_displayPaul Burton1-1/+1
The lowlevel_display() function includes a "1:" label which is never used. Remove it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-11-28boston: Drop unused return valuePaul Burton1-1/+0
The boston lowlevel_init() function zeroes the return register v0, despite the function not being expected to return a value & that value never being used. Remove the redundant assignment to v0. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2017-11-28arm64: zynqmp: Add new ID for RFSoCMichal Simek1-0/+24
This ID is available on zc1254. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Add support for CG/EG/EV device detectionMichal Simek1-2/+66
Version string has unused fields 31:20 which can be used for exporting 9 bits from efuse IPDISABLE regs to recognize eg/cg/ev devices. These efuse bits are setup for certain devices. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Use u32 type instead of uint32_tMichal Simek1-2/+2
Warning is reported by checkpatch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm: zynq: Add mini u-boot configuration for zynqMichal Simek1-0/+1
Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-15 22:11:53 +0000