aboutsummaryrefslogtreecommitdiff
path: root/board
AgeCommit message (Collapse)AuthorFilesLines
2009-10-16ppc/P1_P2_RDB: On-chip BootROM supportDipen Dudhat1-0/+12
On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2-0/+17
NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from NAND Boot support on MPC8536DS. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-16sbc8641d: fix LAW so board doesn't hang on DDR initPaul Gortmaker1-1/+4
All versions between now and since this commit: commit bd76729bcbfd64b5d016a9b936f058931fc06eaf MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default will fail to allow the SBC8641D to get past DDR init, because the LAW config was overlapping. Eventually this board will do SPD EEPROM config, but for now this gets the board working again. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-13at91: Update MEESC board supportDaniel Gorsulowski1-7/+58
This patch implements several updates: -disable CONFIG_ENV_OVERWRITE -add new hardware style variants and set the arch numbers appropriate -pass the serial# and hardware revision to the kernel -removed unused macros from include/configs/meesc.h -fixed multiline comment style Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-10-13TI: OMAP3: Overo Tobi ethernet supportOlof Johansson2-31/+91
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp. This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Dirk Behme <dirk.behme@googlemail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-13TI: DaVinci DM365: Enabling network Support on DM365 EVMSandeep Paulraj1-0/+43
This patch enables EMAC on the DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13OMAP3: Clean up whitespace in mux configsOlof Johansson7-1794/+1794
Switch from space-based indentation to tab-based in mux configs, as pointed out by WD at: http://lists.denx.de/pipermail/u-boot/2009-September/061241.html Nothing but whitespace changes in this patch (diff -w gives no output). Signed-off-by: Olof Johansson <olof@lixom.net>
2009-10-13Support for the OpenRD base boardSimon Kagstrom5-0/+463
The implementation is borrowed from the sheevaplug board and the Marvell 1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-13Kirkwood: mv88f6281gtw_ge: Add kwbimage build supportPrafulla Wadaskar2-0/+168
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board. To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-13Kirkwood: rd6281a: Add kwbimage build supportPrafulla Wadaskar2-0/+170
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform. To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-13Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix4-0/+433
these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13Add support for Eukrea CPUAT91 SBCTom Rix3-0/+132
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13TI DaVinci DM365: Removing header file which does not existSandeep Paulraj1-1/+0
The DaVinci DM365 EVM board specific code was including a header file which does not exist. So removing this header file. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-09Merge branch 'reloc'Wolfgang Denk224-365/+13
2009-10-08tqm5200: Correct comment and code in post_hotkeys_pressed.Detlev Zundel1-4/+2
This fixes the code and the comment according to the original intent of doing an intensive memory test when PSC6_3 is pulled low on the STK52xx. Notably PORT_CONFIG will be overridden with this correct code now, so beware. The original code only worked by coincidence depending on the PORT_CONFIG setting from the header file. The new code was tested to ensure that the (undocumented) memory test still works on the STK52x. Signed-off-by: Detlev Zundel <dzu@denx.de> CC: Martin Krause <Martin.Krause@tqs.de> Minor white-space cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-08mpc512x: fix fixed_sdram() init code.Wolfgang Denk1-6/+6
Commit 054197ba and later fixes used an array to initialize some of the MDDRC parameters; however, the use of an array turned out to be a bad idea as it was not possible to correlate structure entries to array indices in readable and reliable way. Now we use a struct instead, which makes this self-explanatory. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-07ppc_4xx: Apply new HW register namesNiklaus Giger28-376/+376
Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scanStefan Roese5-0/+15
This message is printed upon PCIe bus scan, not only upon error, but also if no PCIe device is detected at all. Since this is not an error, let's remove this message in this case. We already have the message "link is not up." if there is no PCIe device present. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
2009-10-04Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI APIBen Warren34-58/+413
All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03p3mx: Remove serial relocation fixupsPeter Tyser1-10/+0
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03mpl: Remove memory test relocation fixupsPeter Tyser4-33/+1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03fpga: Remove relocation fixupsPeter Tyser5-16/+12
PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03ppc: Remove board-specific command table relocation fixupsPeter Tyser4-70/+0
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03ppc: Remove pci config table pointer relocation fixupsPeter Tyser2-25/+0
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03ppc: Enable full relocation to RAMPeter Tyser208-211/+0
The following changes allow U-Boot to fully relocate from flash to RAM: - Remove linker scripts' .fixup sections from the .text section - Add -mrelocatable to PLATFORM_RELFLAGS for all boards - Define CONFIG_RELOC_FIXUP_WORKS for all boards Previously, U-Boot would partially relocate, but statically initialized pointers needed to be manually relocated. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-02ppc4xx: Add SDRAM detection for PMC440 boardsMatthias Fuchs2-32/+61
This patch adds support to detect the amount of DDR2 SDRAM on PMC440 modules. Detection is done by probing through a list of available and supported hardware configurations from 1GByte down to 256MB. The static TLB entry is replaced by dynamically created entries. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-30Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk3-1/+31
2009-09-30Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk1-1/+0
2009-09-30Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk77-1156/+1155
2009-09-30On-chip ROM boot: MPC8536DS supportMingkai Hu1-0/+12
The MPC8536E is capable of booting from the on-chip ROM - boot from eSDHC and boot from eSPI. When power on, the porcessor excutes the ROM code to initialize the eSPI/eSDHC controller, and loads the mian U-Boot image from the memory device that interfaced to the controller, such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it. The memory device should contain a specific data structure with control word and config word at the fixed address. The config word direct the process how to config the memory device, and the control word direct the processor where to find the image on the memory device, or where copy the main image to. The user can use any method to store the data structure to the memory device, only if store it on the assigned address. The on-chip ROM code will map the whole 4GB address space by setting entry0 in the TLB1, so the main image need to switch to Address space 1 to disable this mapping and map the address space again. This patch implements loading the mian U-Boot image into L2SRAM, so the image can configure the system memory by using SPD EEPROM. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30NAND boot: MPC8536DS supportMingkai Hu2-0/+18
MPC8536E can support booting from NAND flash which uses the image u-boot-nand.bin. This image contains two parts: a 4K NAND loader and a main U-Boot image. The former is appended to the latter to produce u-boot-nand.bin. The 4K NAND loader includes the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. The main U-Boot image just like a general U-Boot image except the parts that included by CONFIG_SYS_RAMBOOT. When power on, eLBC will automatically load from bank 0 the 4K NAND loader into the FCM buffer RAM where CPU can execute the boot code directly. In the first stage, the NAND loader copies itself to RAM or L2SRAM to free up the FCM buffer RAM, then loads the main image from NAND flash to RAM or L2SRAM and boot from it. This patch implements the NAND loader to load the main image into L2SRAM, so the main image can configure the RAM by using SPD EEPROM. In the first stage, the NAND loader copies itself to the second to last 4K address space, and uses the last 4K address space as the initial RAM for stack. Obviously, the size of L2SRAM shouldn't be less than the size of the image used. If so, the workaround is to generate another image that includes the code to configure the RAM by SPD and load it to L2SRAM first, then relocate the main image to RAM to boot up. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-30sbc8548: reclaim wasted sector in boot flashPaul Gortmaker1-1/+1
By nature of being based off the MPC8548CDS board, this board inherited an ENV_SIZE setting of 256k. But since it has a smaller flash device (8MB soldered on), it has a native sector size of 128k, and hence the ENV_SIZE was causing 2 sectors to be used for the environment. By removing the unused sector, we can push TEXT_BASE up closer to the end of address space and reclaim that sector for any other application. This also fixes the mismatch between TEXT_BASE and MONITOR_LEN reported by Kumar earlier. Since this board also supports the ability to boot off the 64MB SODIMM flash, this change is forward looking with that in mind; i.e. the settings for MONITOR_LEN and ENV_SIZE will work when the 512k sectors of the SODIMM flash are used for alternate boot in the future. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-28MIPS: VCT: Remove read_spareram referenceShinya Kuribayashi1-1/+0
The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove unused read_spareram and add unlock_all as kernel does) forgot to remove a local reference to read_spareram in board/micronas/vct/ebi_onenand.c, which causes the following build failure when configured with OneNAND: ebi_onenand.c: In function 'onenand_board_init': ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram' make[1]: *** [ebi_onenand.o] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [board/micronas/vct/libvct.a] Error 2 Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-09-28ppc4xx: Remove mtsdram0() marcos and use common mtsdram() insteadStefan Roese1-8/+7
Additionally some whitespace coding style fixes. Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper caseStefan Roese20-207/+207
The latest PPC4xx register cleanup patch missed some SDRAM defines. This patch now changes lower case UIC defines to upper case. Also some names are changed to match the naming in the IBM/AMCC users manuals (e.g. mem_mcopt1 -> SDRAM0_CFG). Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28ppc4xx: Convert PPC4xx UIC defines from lower case to upper caseStefan Roese69-948/+948
The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-25mpc83xx: mpc8360emds: Add QE USB device tree fixupsAnton Vorontsov1-0/+12
With this patch we can change QE USB mode without need to hand-edit the device tree. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUsAnton Vorontsov1-6/+50
This patch fixes various ethernet issues with gigabit links handling in U-Boot. The workarounds originally implemented by Kim Phillips for Linux kernel. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is availableAnton Vorontsov1-1/+4
Since commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 ("mpc8360emds: rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux. Though, it appears that QE Ethernet in Gigabit mode can't transmit large packets when it tries to work with a data in LBC SDRAM (memtest didn't discover any issues, is LBC SDRAM just too slow?). With this patch we can still use the board without DDR memory, but if DDR is available, we don't use LBC SDRAM. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-25mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]Wolfgang Denk1-1/+1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25mpc5200, mucmc52, uc101: config cleanupHeiko Schocher2-0/+14
- As these boards are similiar, collect common config options in manroland/common.h and manroland/mpc52xx-common.h for mpc5200 specific common options for this manufacturer. - add OF support - update default environment Signed-off-by: Heiko Schocher <hs@denx.de> Minor edit of commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25Add Elpida Memory Configuration to mpc5121ads BoardsMartha M Stan1-2/+97
Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-25mpc512x: Streamlined fixed_sdram() init sequence.Martha M Stan3-3/+3
Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor cleanup: Re-ordered default_mddrc_config[] to have matching indices. This allows to use the same index "N" for source and target fields; before, we had code like this out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]); which always looked like a copy & paste error because 2 != 3. Also, use NULL when meaning a null pointer. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-24mpc8610hpcd: Use common 86xx fdt fixup codePeter Tyser1-13/+1
Using the common 86xx fdt fixups removes some board-specific code and should make the mpc8610hpcd easier to maintain in the long run. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: update PCI/PCI-e support codePaul Gortmaker3-122/+72
The PCI/PCI-e support for the sbc8548 was based on an earlier version of what the MPC8548CDS board was using, and in its current state it won't even compile. This re-syncs it to match the latest codebase and makes use of the new shared PCI functions to reduce board duplication. It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and similarly it coalesces the PCI and PCI-e mem into one single TLB. Both PCI-x and PCI-e have been tested with intel e1000 cards under linux (with an accompanying dts change in place) Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: correct local bus SDRAM size from 64M to 128MPaul Gortmaker2-8/+23
The size of the LB SDRAM on this board is 128MB, spanning CS3 and CS4. It was previously only being configured for 64MB on CS3, since that was what the original codebase of the MPC8548CDS had. In addition to setting up BR4/OR4, this also adds the TLB entry for the second half of the SDRAM. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: use I/O accessorsPaul Gortmaker1-46/+45
Sweep throught the board specific file and replace the various register proddings with the equivalent I/O accessors. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: remove eTSEC3/4 voltage hackPaul Gortmaker1-6/+0
With only eTSEC1 and 2 being brought out to RJ-45 connectors, we aren't interested in the eTSEC3/4 voltage hack on this board Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: enable access to second bank of flashPaul Gortmaker1-4/+24
The sbc8548 has a 64MB SODIMM flash module off of CS6 that previously wasn't enumerated by u-boot. There were already BR6/OR6 settings for it [used by cpu_init_f()] but there was no TLB entry and it wasn't in the list of flash banks reported to u-boot. The location of the 64MB flash is "pulled back" 8MB from a 64MB boundary, in order to allow address space for the 8MB boot flash that is at the end of 32 bit address space. This means creating two 4MB TLB entries for the 8MB chunk, and then expanding the original boot flash entry to 64MB in order to cover the 8MB boot flash and the remainder (56MB) of the user flash. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24sbc8548: cosmetic line re-wrapPaul Gortmaker1-4/+8
Fix the extra long lines to be consistent with u-boot coding style. No functional change here. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
generated by cgit v1.1 at 2024-07-15 12:53:00 +0000