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2022-01-05xilinx: firmware: Move dcache handling directly to pmufw load configMichal Simek1-1/+0
Core function should make sure that data is stored properly that's why move cache operations directly to zynqmp_pmufw_load_config_object() to be able to call it from other functions. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05arm64: zynqmp: Switch SOM to shared psu configurationMichal Simek1-130/+70
Previous psu init was targeting SOM + KV260 carrier card and also contain configurations for other devices on carrier card. This config is removing all expected configurations for CC and let U-Boot to handle all of it self. This configuration is designed for SOM itself (and I would bet without eMMC). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/5782131058dc372befd3fdb4dceabeea5ba56606.1637236693.git.michal.simek@xilinx.com
2021-11-15xilinx: zynqmp: fix ZYNQMP_RESTORE_JTAG checkRicardo Salveti1-1/+1
Config check should be done without the SPL_ prefix. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Link: https://lore.kernel.org/r/20211104192802.3093811-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-29arm64: zynqmp: Replace comma by semicolonMichal Simek1-1/+1
Fix issue reported by checkpatch.pl WARNING: Possible comma where semicolon could be used #499: FILE: board/xilinx/zynqmp/zynqmp.c:499: + size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE), + reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/ef264451ef9455ada9784bedbc91f74b94b8a237.1634799528.git.michal.simek@xilinx.com
2021-10-29xilinx: zynqmp: Save multiboot as variableMichal Simek1-1/+9
Save multiboot register as u-boot variable. And use it as primary source for composing dfu_alt_info for capsule update. If variable is not defined Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Link: https://lore.kernel.org/r/96556221443489c952717bcb340b4707901c9bdd.1635149450.git.michal.simek@xilinx.com
2021-10-21xilinx: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAMEMichal Simek1-6/+9
There is no need to use u-boot.itb as name when this is already recorded in CONFIG_SPL_FS_LOAD_PAYLOAD_NAME macro. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Link: https://lore.kernel.org/r/38a236ed317510c26b37525da0e7bc26b411222c.1634558534.git.michal.simek@xilinx.com
2021-10-21xilinx: zynqmp: Handle fallthrough statement properlyMichal Simek1-1/+1
Now intentional fallthrough in switch-case should be labelled that's why convert comment. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Link: https://lore.kernel.org/r/b3e976bd3b9bbe7061fec5ba0a3b4e78fdd78394.1634556602.git.michal.simek@xilinx.com
2021-10-21arm64: zynqmp: Add support for DLC21 (Smartlynq+) boardMichal Simek1-0/+922
DLC21 is used as fast jtag cable. The patch adds support for this board from PS perspective. The most interesting part on the board is seps525 oled display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3d35cd6a11cffc7456e21a88b214cc965734e852.1634231268.git.michal.simek@xilinx.com
2021-10-21zynqmp: restore the jtag interfaceJorge Ramirez-Ortiz1-0/+19
When boot.bin is configured for secure boot the CSU will disable the JTAG interface on all cases. Some boards might rely on this interface for flashing to QSPI in which case those systems might end up bricked during development. This commit will restore the interface under CSU control Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-30arm64: zynqmp: Add psu_init_gpl for vck190/vmk180 SCMichal Simek1-0/+2052
Add psu_init_gpl file for getting SPL to work directly from the tree. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/6675723ad52d29982e62c6ca4832ed18688076cb.1632488774.git.michal.simek@xilinx.com
2021-09-30xilinx: zynqmp: Set modeboot env variable in eMMC bootmodeAshok Reddy Soma1-0/+1
Set environment variable modeboot to "emmcboot" in case of eMMC boot mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c61231e4b8c6118862dfc82e923211637bf29991.1631688736.git.michal.simek@xilinx.com
2021-08-26xilinx: zynqmp: Check that DT is 64bit alignedMichal Simek1-0/+3
DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try to read information about reserved memory. The system ends in exception without any clue what's going it. That's why detect not aligned DT and panic to show where the issue is coming from. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Add debug messages for boot modeMichal Simek1-0/+3
Add debug messages to see HW boot mode and also alternative boot mode in logs directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma2-117/+0
Move tapdelay function calls to zynq_sdhci.c and make them static inline. zynqmp_tap_delay.h has function prototypes for the functions defined in tap_delays.c, which will not be needed anymore. Remove tap_delays.c and zynqmp_tap_delay.h files. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma1-67/+81
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set tapdelay values and DLL resets. Continue to use this for SPL and mini U-Boot where U-Boot will be executed at EL3 level. Use firmware call xilinx_pm_request() using appropriate arguments to set input/output tapdelays and also for DLL resets in regular flow(EL2). Host driver should explicitly request DLL reset before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues in some cases. Also handle error return where possible. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-06xilinx: zynqmp: Add support for runtime dfu_alt_info setupMichal Simek1-0/+54
The main reason for this to be implemented is capsule update. Two memories are supported and tested which is MMC FAT based and QSPI based. For creating capsule these commands are used: ./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin ./tools/mkeficapsule --raw u-boot.itb --index 2 capsule2.bin Then transfer to SD card where these commands run: load mmc 0 10000000 capsule1.bin efidebug capsule update -v 10000000 load mmc 0 10000000 capsule2.bin efidebug capsule update -v 10000000 Depends on the boot device used are binaries loaded to qspi or mmc fat partition. Also multiboot register is handled to make sure that the same location(id) is used as image which is upgraded. Two locations are used by purpose for SPL flow. If only boot.bin is used create only one capsule. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: use zynqmp_mmio_read() in multi_boot()Michal Simek1-2/+5
When U-Boot runs in EL2 there is no access to csu_base registers that's why this has to be done via firmware interface to find out multi boot register value. Till now this function is called only from SPL in EL3. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Change multi_boot() to return valueMichal Simek1-4/+2
Change multi_boot() to return multiboot value and move print out of this function and let this function to be used by other functions without duplicating message. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Free allocated field for target variableMichal Simek1-0/+1
When env_set() is called there is no need to allocate memory for variable which is already saved that's why free it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-23/+23
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-26arm64: zynqmp: Do not define do_reset() if sysreset is enabledMichal Simek1-0/+2
The SPL can also be compiled with sysreset drivers just fine, so update the condition to cater for that option. The same change was done by commit efa1a62ad2dd ("ARM: imx8m: Do not define do_reset() if sysreset is enabled"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26xilinx: Return ENVL_NOWHERE instead of ENVL_UNKNOWNMike Looijmans1-3/+3
The system refuses to boot without any environment, so return ENVL_NOWHERE when there's nowhere to store the environment instead of ENVL_UNKNOWN. This fixes that the board won't boot from eMMC when CONFIG_ENV_IS_IN_FAT is not defined, for example. Similar for other combinations. Fixes: 1025bd098aa8 "xilinx: zynqmp: Add support for saving variables" Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-35/+38
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-01xilinx: zynqmp: Add support for 67dr siliconT Karthik Reddy1-0/+5
Add zynqmp 67dr silicon to zynqmp device id table. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23zynqmp: Do not place u-boot to reserved memory locationMichal Simek1-0/+21
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not handling this configuration that the part of memory is reserved and shouldn't be used by U-Boot. That's why read all reserved memory locations and don't use it. The code was taken from commit 4a1b975dac02 ("board: stm32mp1: reserve memory for OP-TEE in device tree") and commit 1419e5b5167e ("stm32mp: update MMU config before the relocation") which is used by stm32 and does the job properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Handle MMC seq number based on boot deviceMichal Simek1-0/+35
K26 has EMMC and SD and default 0 is not working when system is booting out of SD which is controller 1. Add controller autodetection via mmc_get_env_dev(). The same code is used for distro_boot selection done in board_late_init(). bootseq variable can't be reused because this is called so late. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add psu_init_gpl for k26 boardsMichal Simek2-0/+674
Add psu_init_gpl file for getting SPL to work directly from the tree. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add support for SVD devicesMichal Simek1-1/+27
SVDs are using different name which can't be handled via zynqmp_devices structure. That's why introduce zynqmp_detect_svd_name() which checks ID code for these devices and show proper name for them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-11arm64: zynqmp: Writing correct value to ANALOG_BUSAdrian Fiergolski1-0/+11
The default register configuration after powerup for PSSYSMON_ANALOG_BUS register is incorrect. Hence, fix this in SPL by writing correct fixed value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c") in Xilinx:embeddedsw[1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynqmp: Add usb dfu/thor distro boot supportT Karthik Reddy1-1/+1
In usb boot mode distro boot should select usb device as primary boot device instead of usb host. So make usb dfu as primary boot device. But do not list it in boot_targets as fallback option because it is not classic mode for booting. Using 60s timeout by default should be enough time for dfu-utils to start transaction. In case none needs this please change timeout value in the command or disable CONFIG_DFU_TIMEOUT. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-31Merge tag 'xilinx-for-v2021.07' of ↵WIP/31Mar2021-nextTom Rini3-82/+3910
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
2021-03-30arm64: zynqmp: Update psu_init for zcu1275Michal Simek1-82/+148
Update clock/pll setup, ddr, MIOs based on 2020.2 hw design. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30arm64: zynqmp: Add missing psu inits for zcu208/216Michal Simek2-0/+3762
Add missing configurations file for zcu208 and zcu216. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler1-1/+1
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-28Correct U-Boot upstream repositoryHeinrich Schuchardt1-1/+1
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵WIP/23Feb2021Tom Rini3-5/+2
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT nameMichal Simek2-0/+0
Folder names corresponds to DT name. These boards have been renamed from zc1275 to zcu1275 by commit shown below and this should be the part of that commit. Fixes: 420d44678119 ("arm64: zynqmp: Rename zc1275 to zcu1275") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23arm64: zynqmp: Do not clear reset reasonMichal Simek1-5/+1
There is no need to clear reset reason register because it is protected by PMUFW already which is reported when verbose log is enabled as: pm_core.c@733 APU> No write permission to 0xFF5E0220 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10xilinx: Show silicon version in SPLMichal Simek1-0/+1
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-20xilinx: zynqmp: Save bootseq number for SD/EMMC boot modesMichal Simek1-0/+1
For systems which has both sdhci controllers enable it is worth to export bootseq number for variables. Then the variable can be used in custom scripts to tune logic for OS. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-06Merge tag 'xilinx-for-v2021.04' of ↵WIP/06Jan2021-nextTom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
2021-01-05xilinx: Fill git repository for Xilinx boardsMichal Simek1-0/+1
All Xilinx SoCs have repository location filled already but boards are covered by different fragment which is missing this link. The patch is extending description with adding proper link to the same repository. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-12-18dm: Avoid accessing seq directlySimon Glass1-6/+6
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29mmc: zynq_sdhci: Add common function to set input/output tapdelaysAshok Reddy Soma1-157/+33
Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27mmc: Define timing macro'sAshok Reddy Soma1-9/+1
Define timing macro's for all the available speeds of mmc. This is done similar to linux. Replace speed macro's used with these new timing macro's wherever applicable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27xilinx: zynqmp: Use tab for macro indentationMichal Simek1-6/+6
Trivial fix. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Do not check 0 as invalid return from snprintfMichal Simek1-1/+1
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't return any return value and all the time returns 0. That's why even correct snprintf was returning in SPL chip ID as "unknown". Change checking condition and allow snprintf to return 0 which is according manual patch successful return. "If an output error is encountered, a negative value is returned." Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()Michal Simek1-1/+1
Fix hex format from 0x%0X to 0x%0x to show correct numbers. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27xilinx: zynqmp: Check return value from xilinx_pm_request()Michal Simek1-1/+5
xilinx_pm_request() can failed that's why also check return value. Fixes: 050f10f103cd ("xilinx: zynqmp: remove chip_id function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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