aboutsummaryrefslogtreecommitdiff
path: root/board/freescale
AgeCommit message (Collapse)AuthorFilesLines
2021-05-11Merge tag 'u-boot-imx-20210502' of ↵WIP/11May2021Tom Rini1-9/+9
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210502 ------------------- - mx6: fixes for Ventana - local fixes from maintainer - imx7d: Ronetix's iMX7-CM - imx8: Ronetix iMX8MQ-CM Engicam i.Core MX8M Compulab iot-gate-imx8 - Fixes i.MX8 documentation - Fixes phy usage with fec
2021-05-11ppc: Remove some SECURE_BOOT defconfigsTom Rini2-9/+1
These specific configs are missing a number of migrations. In addition, they are blocking completion of the now-expired DM_MMC migration as it requires enabling BLK. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-02imx: imx8: Update README with somewhat correct firmware versionsPriit Laes1-9/+9
Current setup instructions for i.MX8QM MEK board include somewhat conflicting instructions, so here's an attempt to fix it. After trying both sets of firmwares, I can conclude that both of them fail to work: - no boot at all with imx-sc-firmware-0.7 / firmware-imx-7.6 - partial success with imx-sc-firmware-1.1 / firmware-imx-8.0: U-Boot 2021.04-rc3-00135-ge0669a43c8 (Mar 08 2021 - 16:49:08 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Freescale i.MX8QM MEK Board: iMX8QM MEK mu_hal_receivemsg timeout Build: SCFW 65afe5f6, SECO-FW 65afe5f6, ATF a-20190 mu_hal_receivemsg timeout sc_misc_get_boot_dev: res:16 Boot: SD0 DRAM: mu_hal_sendmsg timeout sc_rm_is_memreg_owned: mr:0 res:21 ... Signed-off-by: Priit Laes <priit.laes@paf.com>
2021-04-15board: freescale: t208xrdb: fdt fixups under DM_ETHCamelia Groza3-0/+40
Disable the FMan mEMAC 5 and 6 nodes from the fdt since they are not available under the supported RCW. Also disable the associated "fsl,dpa-ethernet" nodes that reference them. This is a simplified version of the fdt_fixup_fman_ethernet call for use under DM_ETH. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15freescale: ls1021atwr: Drop use of CONFIG_RESETSimon Glass1-4/+4
It is not recommended to use CONFIG_xxx defines for things which are not Kconfig options. Rename this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-10ppc: Remove MPC837XEMDS boardTom Rini7-640/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ppc: Remove MPC8308RDB boardTom Rini5-302/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ppc: Remove T2081QDS board and ARCH_T2081 supportTom Rini4-178/+1
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. It is also the only ARCH_T2081 board so remove that support as well. Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove mx6dlarm2 boardTom Rini6-1117/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove mx53evk boardTom Rini5-395/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove s32v234evb boardTom Rini7-731/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ppc: Remove MPC8349ITX boardTom Rini6-718/+0
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove this board. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-09Merge tag 'u-boot-imx-20210409' of ↵Tom Rini26-1209/+5239
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210409 ------------------- - Secure Boot : - HAB for MX8M / MX7ULP - CAAM fixes - Fixes for imxrt1020 - Fixes for USDHC driver - Fixes for Toradex (Colibri / Apalis) - Switch to DM for several boards - mx23 olinuxo - usbarmory - marsboard / riotboard - Gateworks GW Ventana - NXP upstream patches (LPDDR / CAAM / HAB) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-08board: freescale: imxrt1050-evk: fix console is not enabled while init dramGiulio Benetti1-1/+1
While initializing dram in spl_dram_init(), mdelay() is called that in order calls get_ticks() that verifies if timer exists, if doesn't, it throws a panic(), but since preloader_console_init() has still not been called those panic()s will fail. This doesn't help debugging, so let's setup console before calling spl_dram_init() by moving it after spl_dram_init(). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-04-08board: freescale: imxrt1020-evk: fix console is not enabled while init dramGiulio Benetti1-1/+1
While initializing dram in spl_dram_init(), mdelay() is called that in order calls get_ticks() that verifies if timer exists, if doesn't, it throws a panic(), but since preloader_console_init() has still not been called those panic()s will fail. This doesn't help debugging, so let's setup console before calling spl_dram_init() by moving it after spl_dram_init(). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-04-08MAINTAINERS: Use my personal e-mail addressFabio Estevam6-6/+6
Use my personal e-mail address for U-Boot related work. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-04-08imx8mp-evk: switch to use binmanPeng Fan1-0/+10
Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mn-ddr4-evk: switch to use binmanPeng Fan1-0/+10
Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mm_evk: switch to use binman to pack imagesPeng Fan1-0/+9
Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mn: evk: update MAINTAINERSPeng1-1/+2
Add imx8mn_evk_defconfig to be maintained Typo fix Signed-off-by: Peng <peng.fan@nxp.com>
2021-04-08imx8mq_evk: Applying default LPDDR4 script for B2Ye Li1-1/+1
Both i.MX8MQ B1 and B2 should use default LPDDR4 script, while B0 has another dedicated script. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8m: ddr: Disable CA VREF Training for LPDDR4Ye Li2-3/+0
Users reported LPDDR4 MR12 value is set to 0 during PHY training, not the value from FSP timing structure, which cause compliance test failed. The root cause is the CATrainOpt[0] is set to 1 in 2D FSP timing but not set in 1D. According to PHY training application node, to enable the feature both 1D and 2D need set this field to 1, otherwise the training result will be incorrect. The PHY training doc also recommends to set CATrainOpt[0] to 0 to use MR12 value from message block (FSP structure). So update the LPDDR4 scripts of all mscale to clear CATrainOpt[0]. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mn: Add low drive mode support for DDR4/LPDDR4 EVKYe Li5-1/+2513
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mn: Add LPDDR4 EVK board supportPeng Fan4-1/+1632
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and PCA9450B PMIC. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mn_evk: drop duplicated codePeng Fan1-2/+0
uart clk has been enabled, no need enable again. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08power: pca9450: add a new parameter for power_pca9450_initPeng Fan1-1/+1
Currently PCA9450 might have address 0x25 or 0x35, so let user choose the address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-08imx8mn: Update the DDR4 timing script on imx8mn ddr4 evkJacky Bai1-608/+449
On i.MX8MN, we can only support DLL-ON mode only, so update the timing to support 2400mts & 1066mts setpoint. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp_evk: Increase VDD_ARM to 0.95v Overdrive voltagePeng Fan1-0/+14
There is a frequency/timing limitation for SOC and ARM, if SOC is OD voltage/OD freq, then ARM can't run at ND voltage/1.2Ghz, it may have timing risk from SOC to ARM. Current VDD_SOC is set to 0.95v OD voltage in SPL, and kernel will increase bus clocks to OD frequency before it increases ARM voltage. So to conform to the limitation, we'd better increases VDD_ARM to OD voltage in SPL. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp_evk: spl: clean up including headersPeng Fan1-13/+4
Clean up the including headers Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp: refine power on imx8mp boardhaidong.zheng2-0/+171
VDD SOC normal run changed to 0.85V LPDDR4 freq0 change from 4000MTS to 2400MTS Signed-off-by: haidong.zheng <haidong.zheng@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp_evk: Update LPDDR4 refresh timeYe Li1-6/+6
Use more safer refresh time value for 6GB LPDDR4 on this EVK board. Update the parameters for every frequency point. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp_evk: Update LPDDR4 timing for new FW 202006Ye Li1-90/+99
After switching to new LPDDR4 firmware 202006 version, have to update the LPDDR4 timing accordingly from RPA tool. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Sherry Sun <sherry.sun@nxp.com> Tested-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mp: ddr: Add inline ECC feature supportSherry Sun1-0/+27
Add inline ECC support for lpddr4 on imx8mp-evk. And add a config which can enable/disable inline ECC feature for lpddr4 on imx8mp-evk board. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mm/p: remove boot.cmdPeng Fan2-60/+0
These files should not be in U-Boot repo Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08imx8mm_evk: Switch to new imx8mm evk boardYe Li1-16/+17
Update PMIC to use PCA9540, the legacy board not supported by NXP Signed-off-by: Ye Li <ye.li@nxp.com>
2021-04-08imx8mm_evk: Update to latest LPDDR4 scriptYe Li1-412/+280
Update LPDDR4 script to sync with v2020.04 u-boot Signed-off-by: Ye Li <ye.li@nxp.com>
2021-03-29Merge tag 'v2021.04-rc5' into nextWIP/29Mar2021-nextTom Rini1-0/+5
Prepare v2021.04-rc5
2021-03-23board: freescale: t208xrdb: Add link to User GuideChris Packham1-0/+5
The User Guide contains handy things like block diagrams and DIP switch settings and it's even available on the public web. Add a link to it in the README. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini30-1298/+491
Prepare v2021.04-rc4
2021-03-05ppc: qemu: Move board directory from board/freescale to board/emulationBin Meng4-340/+0
board/emulation is the place for other QEMU targets like x86, arm, riscv. Let's move the qemu-ppce500 board codes there. List me as a co-maintainer for this board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop fixed_sdram()Bin Meng1-5/+0
This function is not called anywhere. Only fsl_ddr_sdram_size() is necessary [1] for QEMU. Drop it. [1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init() Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop a custom env variable 'fdt_addr_r'Bin Meng1-3/+0
Now that we have switched to CONFIG_OF_CONTROL, and we can use the env variable 'fdtcontroladdr' directly instead of creating one that is duplicated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Delete the temporary FDT virtual-physical mapping after U-Boot is ↵Bin Meng1-1/+10
relocated After U-Boot is relocated to RAM already, the previous temporary FDT virtual-physical mapping that was used in the pre-relocation phase is no longer needed. Let's delete the mapping. get_fdt_virt() might be used before and after relocation, update it to return different virtual address of FDT. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable VirtIO NET supportBin Meng1-0/+8
By default the QEMU ppce500 machine connects a VirtIO NET to the PCI controller, although it can be replaced to an e1000 NIC via additional command line options. Now that we have switched over to DM PCI, VirtIO support becomes possible. This commit enables the support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop CONFIG_OF_BOARD_SETUPBin Meng1-7/+0
ft_board_setup() is now empty. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Switch over to use DM ETH and PCIBin Meng1-90/+21
At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Switch over to use DM serialBin Meng1-0/+6
The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by: - drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Enable OF_CONTROLBin Meng1-0/+10
The QEMU ppce500 machine generates a device tree blob and passes it to U-Boot during boot. Let's enable OF_CONTROL with OF_BOARD and provide board_fdt_blob_setup() in the board codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop board_early_init_f()Bin Meng1-5/+0
This function does nothing. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: qemu: Drop init_laws() and print_laws()Bin Meng1-10/+0
These are no longer needed. Drop them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>