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2018-01-12mx6memcal: spl: Disambiguate the error messageFabio Estevam1-1/+1
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration() show the same error message, which is confusing for debugging. Disambiguate the mmdc_do_dqs_calibration() error message. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12mx6memcal: spl: Also take i.MX6ULL into accountFabio Estevam1-0/+1
i.MX6ULL also does not support 64-bit DDR bus, so add it to the check logic. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12mx6memcal: Fix the UART ports for mx6sabresd/auto boardsFabio Estevam1-10/+2
mx6sabresd board uses the following pins for console: PAD_CSI0_DAT10__UART1_TX_DATA PAD_CSI0_DAT11__UART1_RX_DATA ,so put it in the same config option as wandboard. mx6sabreauto board uses the following pins for console: PAD_KEY_COL0__UART4_TX_DATA PAD_KEY_ROW0__UART4_RX_DATA So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option. The config option for sabreauto can be added later when needed. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: config wdog pinmuxPeng Fan1-0/+15
Because kernel set WDOG_B mux before pad with the common pinctrl framwork now and wdog reset will be triggered once set WDOG_B mux with default pad setting, we set pad setting here to workaround this. Since imx_iomux_v3_setup_pad also set mux before pad setting, we set as GPIO mux firstly here to workaround it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: Enable DM driverPeng Fan1-244/+125
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers. There are some dependency, such as when DM MMC enabled, USB compile error. Also the i.MX I2C MMC DM driver does not support legacy GPIO interface. So enable them all together. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12board: freescale: common: add pfuze dm codePeng Fan3-0/+85
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-10ls1088ardb: Add SD Secure boot target supportSumit Garg1-0/+5
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [YS: run moveconfig.py -s] Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: ls1088a: SPL size reductionSumit Garg2-7/+13
Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10drivers/misc: Share qbman init between archsAhmed Mansour1-1/+2
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-03mx6: Add board mx6memcal for use in validating DDREric Nelson6-0/+792
This is a virtual "board" that uses configuration files and Kconfig to define the memory layout used by a real board during the board bring-up process. It generates an SPL image that can be loaded using imx_usb or SB_LOADER.exe. When run, it will generate a set of calibration constants for use in either or both a DCD configuration file for boards that use u-boot.imx or struct mx6_mmdc_calibration for boards that boot via SPL. In essence, it is a configurable, open-source variant of the Freescale ddr-stress tool. https://community.nxp.com/docs/DOC-105652 File mx6memcal_defconfig configures the board for use with mx6sabresd or mx6qsabreauto. Signed-off-by: Eric Nelson <eric@nelint.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-29Merge git://git.denx.de/u-boot-imxTom Rini3-46/+26
2017-12-29mx6slevk: imximage.cfg: Handle the CONFIG_SECURE_BOOT caseBreno Lima1-0/+9
Secure boot is not enabled in mx6slevk imximage.cfg, add support for it. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-12-29mx6sxsabresd: Load the correct dtb for revA boardFabio Estevam1-1/+15
Currently only imx6sx-sdb.dtb is loaded, but if revA board is used the correct dtb is imx6sx-sdb-reva.dtb, so make this possible. While at it, remove an extra 'mmc dev'. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-29imx: Add a common way for detecting NXP boards revisionFabio Estevam1-45/+2
NXP development boards based on i.MX6/i.MX7 contain the board revision information stored in the fuses. Introduce a common function that can be shared by different boards and convert mx6sabreauto to use this new mechanism. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-24boards: ls1046ardb: disable unavailable "ethernet" node in dtsPrabhakar Kushwaha1-0/+51
Linux device tree contains "ethernet" node for all possible interface supported by SoC i.e. LS1046A. It is not necessary for a SerDes protocol to support all possible interface. So disable unavailable "ethernet" node in device tree. Also, enable FDT_SEQ_MACADDR_FROM_ENV to fetch MAC address sequentially from environment variables Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: support hwconfig for eSDHC1 enablingYangbo Lu1-20/+35
I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: add more board version informationYangbo Lu1-3/+23
Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: clean up definitions for I2C IO expandersYangbo Lu1-7/+7
This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14board/ls2080a, ls1088a: Add check for mc-dpl applied in fdtYogesh Gaur4-4/+4
Function fdt_fixup_board_enet() performs fdt fixup. Only return fdt_status_okay() when both MC is applied and DPL is deployed, else return fdt_status_fail(). This check is added to LS1088A/LS2080A/LS2088A boards. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-13armv8: ls1088ardb: support force SDHC mode by hwconfigYangbo Lu2-0/+24
The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-08Merge git://git.denx.de/u-boot-mpc85xxTom Rini19-25/+25
2017-12-06armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal1-0/+12
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal2-3/+5
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar1-0/+29
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06powerpc: mpc85xx: Fix static TLB table for SDRAMYork Sun19-25/+25
Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088aqds: Add SD boot support for ls1088qdsAshish Kumar1-0/+1
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088ardb: Add SD boot support for ls1088Ashish Kumar2-1/+5
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-06MAINTAINERS: Add missing boards and config entriesTom Rini1-0/+1
As part of my usual round of build testing, output about missing MAINTAINERS information was not logged, and thus often overlooked. Correct that mistake by ensuring that I log the output of genboardscfg.py every time. As part of that, address a number of missing MAINTAINERS entires. In the case of a missing file, I have put the original submitter down. In the rest of the cases I have added the config (and sometimes relevant header file) to the existing set of file globs. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-31mx6slevk: Call gpio_request()Fabio Estevam1-0/+3
We should call gpio_request() prior to reading the GPIO value. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-31imx: mx6slevk: cleanup board usb codePeng Fan1-49/+0
Since DM_USB enabled, no need the usb code in board file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-27armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_IDAshish Kumar1-0/+1
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII_TXID. These change where introduced in phy driver in commit 05b29aa0cb68 ("net: phy: realtek: fix enabling of the TX-delay for RTL8211F"). Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini4-11/+131
2017-10-12mx6sabresd: Include <usb/ehci-ci.h> header fileDiego Dorta1-0/+1
When compiling with W=1 the following warning is observed: board/freescale/mx6sabresd/mx6sabresd.c:586:5: warning: no previous prototype for ‘board_ehci_hcd_init’ [-Wmissing-prototypes] int board_ehci_hcd_init(int port) Remove this warning by including <usb/ehci-ci.h>. Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
2017-10-12mx6sabresd: Include <asm/mach-imx/spi.h> header fileDiego Dorta1-0/+1
When compiling with W=1 the following warning is observed: board/freescale/mx6sabresd/mx6sabresd.c:680:5: warning: no previous prototype for ‘board_spi_cs_gpio’ [-Wmissing-prototypes] int board_spi_cs_gpio(unsigned bus, unsigned cs) Remove this warning by including <asm/mach-imx/spi.h>. Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
2017-10-12imx: Include <input.h> header fileDiego Dorta4-0/+4
When building with W=1 errors like the one below is seen: board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning: no previous prototype for ‘overwrite_console’ [-Wmissing-prototypes] int overwrite_console(void) Fix the build warnings by including <input.h>. Signed-off-by: Diego Dorta <diego.dorta@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-10-12mx6sabresd: Avoid calling setup_display() from SPL codeFabio Estevam1-3/+3
There is no need call setup_display() from SPL code, so move it to board_init(), which executes only in U-Boot proper. Reported-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-10-09armv8: ls1043ardb: Use static DDR setting for SPL bootYork Sun2-0/+115
This board has soldered DDR chips. To reduce the SPL image size, use static DDR setting instead of dynamic DDR driver. Signed-off-by: York Sun <york.sun@nxp.com>
2017-10-09armv8: ls1088a: Update MC boot sequenceBogdan Purcareata2-11/+16
The MC boot sequence is contained in mc_env_boot. Update LS1088A boards to use this function, and hook it to reset_phy so that it's called late enough, after the ports have been initialized, for proper DPC / DPL fixup. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-22board/ls2080ardb: Update board env based on SoCPriyanka Jain1-0/+12
As per current implementation, default value of board env is based on board filename i.e ls2080ardb. With distro support changes, this env is used to decide upon kernel dtb which is different for other SoCs (ls2088a, ls2081a) combination supported with this board. Add support to modify board env at runtime based on SoC type Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-18imx: imx7d: remove CamelCase from ENET_xMHz macrosEric Nelson1-1/+1
Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-09-11armv8: ls1088aqds: Add support of EC1 and EC2Prabhakar Kushwaha1-0/+34
EC1 and EC2 are RGMII interface on ls1088aqds platform. This patch add support of RGMII with PHY and MDIO Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar1-1/+0
This patch adds support for RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088aqds: Add support of LS1088AQDSAshish Kumar8-5/+843
This patch add support of LS1088AQDS platform. The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and development platform that supports the LS1088A QorIQ Architecture processor. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088ardb: Add support for LS1088ARDB platformAshish Kumar9-0/+711
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Disabled NAND in board header file] Reviewed-by: York Sun <york.sun@nxp.com> WIP: disable NAND for LS1088ARDB
2017-09-11armv8: LS2080ARDB: Add secure boot defconfig for QSPI boot.Udit Agarwal1-0/+5
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: dropped redundant commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11LS2080ARDB: QSPI boot: Secure Boot image validationUdit Agarwal2-4/+7
Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It must be initialized before the PPA. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11fsl-layerscape: Consolidate registers space defination for CCI-400 busAshish Kumar4-7/+13
CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-07armv8: ls1043/ls1046aqds: add support for RGMII_TXIDMadalin Bucur2-0/+2
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: York Sun <york.sun@nxp.com>
2017-08-28imx: imx6: Move gpr_init() function to soc.cBreno Lima2-34/+0
Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D, MX6Q and MX6QP processors move it to the soc.c file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-18m68k: mcf5445x: move early ddr init as board-specificAngelo Dureghello6-0/+288
For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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