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2017-03-28fsl: Secure Boot: Enable IE (Key extention) FeatureUdit Agarwal1-16/+72
For validating images from uboot (Such as Kernel Image), either keys from SoC fuses can be used or keys from a verified table of public keys can be used. The latter feature is called IE Key Extension Feature. For Layerscape Chasis 3 based platforms, IE table is validated by Bootrom and address of this table is written in scratch registers 13 and 14 via PBI commands. Following are the steps describing usage of this feature: 1) Verify IE Table in ISBC phase using keys stored in fuses. 2) Install IE table. (To be used across verification of multiple images stored in a static global structure.) 3) Use keys from IE table, to verify further images. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-14armv8: fsl-lsch3: Update VID supportPriyanka Jain1-12/+162
VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like LS2088A, LS2080A differs from existing logic. -VDD voltage array is different -Registers are different -VDD calculation logic is different Add new function adjust_vdd() for LSCH3 compliant SoCs Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Arpit Goel <arpit.goel@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-09Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigsTom Rini1-0/+1
In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-24NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini1-0/+4
Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-19Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2-0/+96
2017-01-18pmic: pmic_mc34vr500: Add APIs to set/get SWx voltHou Zhiqiang2-0/+96
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-11SPL: Adjust more debug prints for ulong entry_pointTom Rini1-1/+1
With entry_point now being an unsigned long we need to adapt the last two debug prints to use %lX not %X. Fixes: 11e1479b9e67 ("SPL: make struct spl_image 64-bit safe") Signed-off-by: Tom Rini <trini@konsulko.com>
2016-11-23powerpc: MPC8641HPCN: Remove macro CONFIG_MPC8641HPCNYork Sun1-1/+1
Use TARGET_MPC8641HPCN from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8610HPCD: Remove macro CONFIG_MPC8610HPCDYork Sun1-1/+1
Use TARGET_MPC8610HPCD from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P5040DS: Remove macro CONFIG_P5040DSYork Sun1-2/+2
Use CONFIG_TARGET_P5040DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P5020DS: Remove macro CONFIG_P5020DSYork Sun1-2/+2
Use CONFIG_TARGET_P5020DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P4080DS: Remove macro CONFIG_P4080DSYork Sun1-2/+2
Use CONFIG_TARGET_P4080DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P3041DS: Remove macro CONFIG_P3041DSYork Sun1-2/+2
Use CONFIG_TARGET_P3041DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P2041RDB: Remove macro CONFIG_P2041RDBYork Sun1-1/+1
Use CONFIG_TARGET_P2041RDB instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: P1022DS: Remove macro CONFIG_P1022DSYork Sun1-1/+1
Use CONFIG_TARGET_P1022DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8572DS: Remove macro CONFIG_MPC8572DSYork Sun2-2/+2
Use CONFIG_TARGET_MPC8572DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8569MDS: Remove macro CONFIG_MPC8569MDSYork Sun1-1/+1
Use CONFIG_TARGET_MPC8569MDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8555CDS: Remove macro CONFIG_MPC8555CDSYork Sun1-1/+1
Use CONFIG_TARGET_MPC8555CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDSYork Sun1-1/+1
Replace with CONFIG_TARGET_MPC8541CDS from Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8536DS: Remove macro CONFIG_MPC8536DSYork Sun2-2/+2
Use CONFIG_TARGET_MPC8536DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8544DS: Remove macro CONFIG_MPC8544DSYork Sun1-1/+1
Use CONFIG_TARGET_MPC8544DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8548CDS: Remove macro CONFIG_MPC8548CDSYork Sun1-1/+1
Use CONFIG_TARGET_MPC8548CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-10-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini1-38/+14
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
2016-10-06spi: Move freescale-specific code into a private headerSimon Glass1-0/+13
At present there are two SPI functions only used by freescale which are defined in the spi_flash.h header. One function name matches an existing generic SPL function. Move these into a private header to avoid confusion. Arcturus looks like it does not actually support SPI, so drop the SPI code from that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06fsl_sec_mon: Update driver for Security MonitorSumit Garg1-38/+14
Update the API's for transition of Security Monitor states. Instead of providing both initial and final states for transition, just provide final state for transition as Security Monitor driver will take care of it internally. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [York Sun: Reformatted commit message slightly] Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-26Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini3-19/+86
trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23arch, board: squash lines for immediate returnMasahiro Yamada1-3/+1
Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
2016-09-14armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie1-4/+4
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14nxp: ls102xa: add LS1 PSCI system suspendHongbo Zhang1-1/+34
The deep sleep function of LS1 platform, is mapped into PSCI system suspend function, this patch adds implementation of it. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14fsl: csu: add an API to set R/W permission to PCIeHou Zhiqiang1-0/+28
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14fsl: csu: add an API to set individual device access permissionHou Zhiqiang1-14/+20
Add this API to make the individual device is able to be set to the specified permission. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26SECURE_BOOT: Enable chain of trust in SPL frameworkSumit Garg1-1/+33
Override jump_to_image_no_args function to include validation of u-boot image using spl_validate_uboot before jumping to u-boot image. Also define macros in SPL framework to enable crypto operations. Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-21powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPLSumit Garg1-0/+56
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03board: freescale: common: Add flag for LBMAP brdcfg reg offsetAbhimanyu Saini1-2/+9
Add QIXIS_LBMAP_BRDCFG_REG to the save offset of LBMAP configuration register instead of hardcoding it in set_lbmap() function. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03board: freescale: common: Conditionally compile IFC QXIS funcAbhimanyu Saini1-0/+2
Check if qixis supports memory-mapped read/write before compiling IFC based qixis read/write functions. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03board: ls102xa: Fix ICID setupVincent Siles1-2/+5
LS102A ref manual dictates that ICID have to be written to the MSB of the ICID register, not to the LSB. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
2016-05-18arm: uniform usage of u32 in ls102x caam configVincent Siles1-1/+1
Mix usage of uint32_t and u32 fixed in favor of u32. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18arm: Fix SCFG ICID reg addressesVincent Siles1-2/+2
On the LS102x boards, in order to initialize the ICID values of masters, the dev_stream_id array holds absolute offsets from the base of SCFG. In ls102xa_config_ssmu_stream_id, the base pointer is cast to uint32_t * before adding the offset, leading to an invalid address. Casting it to void * solves the issue. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-05Fix various typos, scattered over the code.Robert P. J. Day1-2/+2
Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
2016-03-29armv8/ls2080ardb: Enable VID supportRai Harninder1-1/+14
This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-29SECURE BOOT: Change fsl_secboot_validate func to pass image addrSaksham Jain2-12/+26
Use a pointer to pass image address to fsl_secboot_validate(), instead of using environmental variable "img_addr". Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-29SECURE BOOT: Halt execution when secure boot failSaksham Jain2-1/+6
In case of fatal failure during secure boot execution (e.g. header not found), reset is asserted to stop execution. If the RESET_REQ is not tied to HRESET, this allows the execution to continue. Add esbh_halt() after the reset to make sure execution stops. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-29armv8: fsl-lsch3: Add new header for secure bootSaksham Jain1-5/+30
For secure boot, a header is used to identify key table, signature and image address. A new header structure is added for lsch3. Currently key extension (IE) feature is not supported. Single key feature is not supported. Keys must be in table format. Hence, SRK (key table) must be present. Max key number has increase from 4 to 8. The 8th key is irrevocable. A new barker Code is used. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-03-21freescale: vid: Return i2c mux to default channelWenbin Song1-3/+9
IR chip is on one of the channels on multiplexed I2C-bus. Reset to default channel after accessing. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24qe: move drivers/qe/qe.h to include/fsl_qe.hQianyu Gong2-2/+2
As the QE firmware struct is shared with Fman, move the header file out of drivers/qe/. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini5-142/+316
2016-01-27secure_boot: change error handler for esbc_validateAneesh Bansal2-1/+13
In case of error while executing esbc_validate command, SNVS transition and issue of reset is required only for secure-boot. If boot mode is non-secure, this is not required. Similarly, esbc_halt command which puts the core in Spin Loop is applicable only for Secure Boot. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27secure_boot: enable chain of trust for ARM platformsAneesh Bansal2-0/+18
Chain of Trust is enabled for ARM platforms (LS1021 and LS1043). In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following: - If boot mode is non-secure, return (No Change) - If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27secure_boot: create function to determine boot modeAneesh Bansal1-0/+53
A function is created to detrmine if the boot mode is secure or non-secure for differnt SoC's. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25powerpc/board/t4240rdb: Enable VID supportYing Zhang1-1/+1
The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-07-13 14:47:51 +0000