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2016-07-11Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini8-11/+143
2016-07-11x86: fdt: Drop the unused compatible strings in fdtdecSimon Glass1-6/+0
We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-11dm: gpio: MPC85XX GPIO platform data supportHamish Martin1-0/+6
Define a platform data structure for the MPC85XX GPIO driver to allow use of the driver without device tree. Users should define the GPIO blocks for their platform like this: struct mpc85xx_gpio_plat gpio_blocks[] = { { .addr = 0x130000, .ngpios = 32, }, { .addr = 0x131000, .ngpios = 32, }, }; U_BOOT_DEVICES(my_platform_gpios) = { { "gpio_mpc85xx", &gpio_blocks[0] }, { "gpio_mpc85xx", &gpio_blocks[1] }, }; This is intended to build upon the recent submission of the base MPC85XX driver from Mario Six. We need to use that new driver without dts support and this patch gives us that flexibility. This has been tested on a Freescale T2080 CPU, although only the first GPIO block. Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Reviewed-by: Mario Six <mario.six@gdsys.cc> Tested-by: Mario Six <mario.six@gdsys.cc> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-11dm: sandbox: Convert to use CONFIG_CMD_MMC_OPSSimon Glass1-0/+1
Update the sandbox MMC emulation to use driver model for MMC operations. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11dm: mmc: rockchip: Enable CONFIG_DM_MMC_OPS for all boardsSimon Glass1-0/+1
Enable this option to move rockchip over to use driver model for MMC operations. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11rockchip: Use 'select' instead of defaults in KconfigSimon Glass2-27/+10
Rockchip uses driver model for all subsystems. Specify this in the arm Kconfig rather than as defaults in the Rockchip Kconfig. This means that boards cannot turn these options off, which seems correct. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-09ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHzVignesh R2-8/+4
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: K2G: Add support for QSPI controllerVignesh R2-0/+59
K2G SoC has a Cadence QSPI controller to communicate with NOR flash devices. Add DT nodes to support the same. Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor flash slave node for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: k2g: add support for Davinci SPI controllerVignesh R2-0/+71
K2G SoC has 4 SPI instances that are compatible with davinci_spi controller(present on previous generation of Keystone2 devices). Add DT nodes for the same. K2G EVM has a N25Q128A13 SPI NOR flash connected on SPI-1. Add DT bindings for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: k2l: Enable Davinci SPI controllerVignesh R1-1/+2
Now that davinci_spi driver has been converted to DM framework, enable the same in DT. Also add "spi-flash" as compatible property to n25q128a11 node as it is required for flash device to be probed in U-Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: k2e: Enable Davinci SPI controllerVignesh R1-1/+2
Now that davinci_spi driver has been converted to DM framework, enable the same in DT. Also add "spi-flash" as compatible property to n25q128a11 node as it is required for flash device to be probed in U-Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: k2hk: Enable Davinci SPI controllerVignesh R1-1/+2
Now that davinci_spi driver has been converted to DM framework, enable the same in DT. Also add "spi-flash" as compatible property to n25q128a11 node as it is required for flash device to be probed in U-Boot. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-09ARM: dts: keystone2: add SPI aliases for davinci SPI nodesVignesh R1-0/+3
Add aliases for SPI nodes in order for it to be probed by the DM framework. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-08armv8: Enable CPUECTLR.SMPEN for coherencyMingkai Hu1-0/+8
For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is set. The SMPEN bit should be set before enabling the data cache. If not enabled, the cache is not coherent with other cores and data corruption could occur. For A57/A72, SMPEN bit enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster. This bit should be set before enabling the caches and MMU, or performing any cache and TLB maintenance operations. Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-08arm: Fix setjmp (again)Alexander Graf1-1/+3
Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp code path with thumv1. Unfortunately it missed a constraint that the adr instruction can only refer to 4 byte aligned offsets. So this patch adds the required alignment hooks to make compilation work again even when setjmp doesn't happen to be 4 byte aligned. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Tom Rini <trini@konsulko.com>
2016-07-07Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini1-0/+2
2016-07-05video: tegra: Move to using simple-panel and pwm-backlightSimon Glass3-72/+75
We have standard drivers for panels and backlights which can do most of the work for us. Move the tegra20 LCD driver over to use those instead of custom code. This patch includes device tree changes for the nvidia boards. I have only been able to test seaboard. If this patch is applied, these boards will also need to be synced with the kernel, and updated to use display-timings: - colibri - medcom-wide - paz00 - tec Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-05tegra: dts: Sync tegra20 device tree files with LinuxSimon Glass3-73/+2154
Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-05powerpc: mpc85xx: Do not build errata command in SPLMarek Vasut1-0/+2
The errata command is useless in SPL, so don't build it. This fixes multiple build failures on PowerPC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: York Sun <york.sun@nxp.com> Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")
2016-07-04Merge git://git.denx.de/u-boot-arcTom Rini2-2/+4
2016-07-04arc: make global_data.h usable in assembly filesAlexey Brodkin1-0/+2
Currently on attempt to use global_data.h in an assembly file following will happen: -------------------->8----------------- ./arch/arc/include/asm/global_data.h: Assembler messages: ./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{' ./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}' scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed -------------------->8----------------- In this change we disable struct arch_global_data in ASM which fixes the issue above. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-04arc: Use "-mcpu=archs" instead of deprecated "-marchs" for ARC HSAlexey Brodkin1-2/+2
Newer ARC toolchains don't support "-marchs" option any longer. Instead "-mcpu=archs" should be used. What's also important older toiolchains that support ARC HS cores will also happily accept "-mcpu=archs" so that's a very safe move. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-02sunxi: Add defconfig and DTS file for Allwinner R16 EVB (Parrot)Quentin Schulz2-1/+350
The Parrot Board is an evaluation board with an Allwinner R16 (assumed to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2 controllable buttons, an LVDS port with separated backlight and capacitive touch panel ports, an audio/microphone jack, a camera CSI port, 2 sets of 22 GPIOs and an accelerometer. The DTS file is identical to the one submitted to the upstream kernel. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02sunxi: Add missing boot_media fields in the SPL headerOlliver Schinagl1-0/+2
Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid code corruption") Added defines for MMC0 and SPI as boot identification. After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected values have been confirmed and added to spl.h Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02ARM: uniphier: add external IRQ setup codeMasahiro Yamada2-0/+44
I will carry this work-around until it is cared in the kernel. This looks up the AIDET node and sets up a register to handle active low interrupt signals. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02ARM: dts: uniphier: add AIDET nodesMasahiro Yamada8-0/+40
The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of syscon block related with the interrupt controller. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02ARM: dts: uniphier: sync Device Trees with upstream LinuxMasahiro Yamada22-138/+99
I periodically sync Device Trees for better maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30ARM: uniphier: fix typo "talbe"Masahiro Yamada1-1/+1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-29x86: coreboot: Remove the dummy pch driverBin Meng2-27/+0
There is a dummy pch driver in the coreboot directory. This causes drivers of its children fail to function due to empty ops. Remove the whole file since it is no longer needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-28Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini7-124/+21
2016-06-28armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIsAbhimanyu Saini3-105/+0
Currently layescape SoCs are not using cpu nodes. So removing them in favour of compatibly with similar SoCs that have different cores like LS2080A and LS2088A. This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCsPrabhakar Kushwaha3-16/+16
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs. like LS2080A, LS1043A, LS1012A. So append "A" to SoC names. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-26arm: at91: taurus/axm: add DM and DTS supportHeiko Schocher3-0/+124
add DM and DTS support for the at91 based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: smartweb: add DM and DTS supportHeiko Schocher3-1/+116
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260Heiko Schocher4-0/+3012
Add this files from Linux v4.6-rc5 66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO] Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26corvus DTS / DM supportHeiko Schocher3-1/+115
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [rebase on current ToT, don't delete gurnard DTB creation] Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26arm: at91: add CONFIG_AT91SAM9M10G45Heiko Schocher1-12/+14
add support for CONFIG_AT91SAM9M10G45. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26ARM: at91: Don't invoke spl_boot_device() twiceMarek Vasut1-1/+1
Since the spl_boot_mode() is now passed the boot device to boot from, make use of it instead of inquiring for the boot device again. This allows board_boot_order() to function correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26common: Pass the boot device into spl_boot_mode()Marek Vasut14-14/+14
The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-24board/BuR: rename kwb board to brxre1Hannes Schmelzer1-3/+3
Rename B&R kwb board to brxre1 Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24board/BuR: rename tseries board to brppt1Hannes Schmelzer1-3/+3
Rename B&R tseries board to brppt1 Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24arm: bcm235xx: update clock frameworkSteve Rae1-5/+5
The handling of the "usage counter" is incorrect, and the clock should only be disabled when transitioning from 1 to 0. Reported-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: fix kps ccuChris Brand1-5/+1
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: implement the boot0 hook codeSteve Rae1-0/+15
Choose the Kconfig boot0 hook option and implement the required code. Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24ARM: armv7: refactor Makefile slightlyMasahiro Yamada1-9/+2
Use Kbuild standard style where possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24ARM: move #ifdef to match the error handling codeMasahiro Yamada1-2/+5
Match the #ifdef ... #endif and the code, ret = do_something(); if (ret) return ret; This will make it easier to add more #ifdef'ed code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24arm64: optimize smp_kick_all_cpusMasahiro Yamada1-3/+1
gic_kick_secondary_cpus can directly return to the caller of smp_kick_all_cpus. We do not have to use x29 register here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-24board: amlogic: Rename folder for Amlogic boardsCarlo Caione1-1/+1
s/hardkernel/amlogic/ to have a single place for all the amlogic-based boards. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Carlo Caione <carlo@endlessm.com> Acked-by: Beniamino Galvani <b.galvani@gmail.com>
2016-06-24omap3: bugfix in timer on rolloverDaniel Gorsulowski1-1/+1
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2016-06-24armv8/fsl_lsch2: Correct the cores frequency initializationHou Zhiqiang1-3/+5
The register CLKCNCSR controls the frequency of all cores in the same cluster. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-10-10 08:30:17 +0000