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2020-04-24arm: add Cubieboard7 board supportAmit Singh Tomar1-0/+92
The Cubieboard is a single board computer containing a Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores). This patch adds respective defconfig alongwith .dts(copied from Linux v5.5-rc6 with hash "b3a987b0264d"). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24actions: Move defconfig options to KconfigAmit Singh Tomar1-0/+1
This patch moves some of the config options from bubblegum_96_defconfig to respective Kconfig files. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: add support Actions Semi S700Amit Singh Tomar1-0/+5
This patch adds basic support for Actions Semi based S700 SoC, which is driven by common owl framework. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: actions: s700: add u-boot specific dtsi fileAmit Singh Tomar1-0/+18
Devices like uart and clk are needed to be enabled before relocation. this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: add S700 SoC device treeAmit Singh Tomar2-0/+250
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24clk: actions: Add common clock driverAmit Singh Tomar3-57/+58
This patch converts S900 clock driver to something common that can be used for other SoCs, for instance S700(few of clk registers are same). Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: actions: s900: add u-boot specific dtsi fileAmit Singh Tomar1-0/+17
Devices like uart and clk are needed to be enabled before relocation. This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: sync dts for Action Semi S900Amit Singh Tomar2-22/+302
Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: rename sysmap-s900 to sysmap-owlAmit Singh Tomar2-4/+4
Now that memory maps(for both S700 and S900 SoCs) can be managed using a common file, rename sysmap-s900 to sysmap-owl to reflect the same. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: actions: Add common framework for Actions Owl Semi SoCsAmit Singh Tomar4-19/+71
This commit adds common arch support for Actions Semi Owl series SoCs and removes the Bubblegum96 board files. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24common/board_f: Make reserve_mmu genericOvidiu Panait1-1/+1
Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu routines. Also, define a weak nop stub for it. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24arm: asm/cache.c: Introduce arm_reserve_mmuOvidiu Panait4-2/+20
As a preparation for turning reserve_mmu into an arch-specific variant, introduce arm_reserve_mmu on ARM. It implements the default routine for reserving memory for MMU TLB and needs to be weakly defined in order to allow for machines to override it. Without this decoupling, after introducing arch_reserve_mmu, there would be two weak definitions for it, one in common/board_f.c and one in arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.cOvidiu Panait1-0/+28
Move the ARM-specific reserve_mmu definition from common/board_f.c to arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24Merge tag 'u-boot-stm32-20200424' of ↵Tom Rini8-1654/+634
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Solve stm32mp15 pinctrl dts issue (patch conflict in branches master and next) - Split device tree for DHCOR Som and AV 96 board - Update PLL4 setting in AV96 board - Enable bootd, iminfo, imxtract on DHCOM
2020-04-24qemu: don't allow to select 32- and 64-bitHeinrich Schuchardt1-5/+9
TARGET_QEMU_ARM_64BIT and TARGET_QEMU_ARM_32BIT should be mutually exclusive. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 boardMarek Vasut6-498/+536
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top of an AV96 reference board. Split the DTs to reflect that and make sure to DHCOR SoM can be reused on other boards easily. It is also highly recommended to configure the board for the DHCOM make stm32mp15_dhcom_basic_defconfig make DEVICE_TREE=stm32mp15xx-dhcor-avenger96 as that permits reusing the board code for the DH components, like accessing and reading out the ethernet MAC from EEPROM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
2020-04-24ARM: dts: stm32: Adjust PLL4 settings on AV96Marek Vasut1-2/+2
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which can not easily divide the clock down to e.g. 50 MHz for high speed SD and eMMC devices, so those devices end up running at 30 MHz as that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz for optimal operation of both SD and eMMC, SPDIF clock are not that much slower and FDCAN is also unaffected. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-24ARM: dts: stm32mp1: remove file stm32mp157-pinctrl.dtsiPatrick Delaunay3-1154/+96
Remove the unnecessary file stm32mp157-pinctrl.dtsi and solve all issues introduced by the commit 891483186052b2598 ("Merge branch 'next'") after a conflict on the patch applied in the next branch in commit 1a4f57c895cc ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1") Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04 - commit 4fdbe6487daa ("ARM: dts: stm32: Add alternate pinmux for SDMMC1 direction pins")' - commit 5fdcba64027f ("ARM: dts: stm32: Add alternate pinmux for SDMMC2 pins 4-7")' - commit 955de5111112 ("ARM: dts: stm32: Add alternate pinmux for ethernet RGMII")' Cc: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-23riscv: Move all fdt fixups togetherAtish Patra2-33/+33
Keep all the fdt fixups together for better code management. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: Copy the reserved-memory nodes to final DTAtish Patra1-1/+7
The DT used by U-Boot may be different from the DT being passed to the OS if the DT is loaded from external media such as network or mmc. In that case, the reserved-memory node needs to be copied to the DT passed to the OS. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: Setup reserved-memory node for FU540Atish Patra1-0/+15
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE. Enable OF_BOARD_FIXUP to update the DT with reserved-memory node. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra6-0/+108
In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can pass this information via reserved-memory node in device tree so that S-mode software can access this information. This patch provides a framework to copy to the reserved-memory node from one DT to another. This will be used to update the DT used by U-Boot and the DT passed to the next stage OS. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: Add boot hartid to device treeAtish Patra1-0/+22
Linux booting protocol mandates that register "a0" contains the hartid. However, U-Boot can not pass the hartid via a0 during standard UEFI protocol. DT nodes are commonly used to pass such information to the OS. Add a DT node under chosen node to indicate the boot hartid. EFI stub in Linux kernel will parse this node and pass it to the real kernel in "a0" before jumping to it. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: Make SBI v0.2 the default SBI versionBin Meng1-1/+1
To work with latest OpenSBI release (v0.7 or above) that has the HSM extension support, select the SBI v0.2 support by default. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23riscv: Add Kconfig option for SBI v0.2Bin Meng1-1/+19
SBI v0.2 is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. For example, with SBI v0.2 HSM extension, only a single hart need to boot and enter operating system. The booting hart can bring up secondary harts one by one afterwards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23riscv: Add SMP Kconfig option dependency for U-Boot properBin Meng1-0/+1
U-Boot proper running in S-mode only need SMP support when using SBI v0.1. With SBI v0.2 HSM extension, it does not need implement multicore boot in U-Boot proper. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng5-11/+22
With SBI v0.2 HSM extension, only a single hart need to boot and enter operating system. The booting hart can bring up secondary harts one by one afterwards. For U-Boot running in SPL, SMP can be turned on, while in U-Boot proper, SMP can be optionally turned off if using SBI v0.2 HSM. Introduce a new SPL_SMP Kconfig option to support this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23riscv: Merge unnecessary SMP ifdefs in start.SBin Meng1-4/+0
Two consecutive SMP ifdefs blocks can be combined into one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23riscv: qemu: Remove the simple-bus driver for the SoC nodeBin Meng1-14/+0
Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a "riscv-virtio-soc" compatible string, and a "simple-bus" driver was created to accommodate that special case in U-Boot. Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus", hence the special simple-bus driver is no longer needed. Update the doc to mention the latest tested QEMU version 4.2.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23riscv: ax25: cache: Remove SPL_RISCV_MMODE config checkPragnesh Patel1-8/+8
CONFIG_IS_ENABLED(FOO) will check FOO config option for U-Boot, SPL and TPL, so remove unnecessary CONFIG_IS_ENABLED() Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-22Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-0/+12
- mvebu bubt cmd: Add A38x support (Joel) - Clearfog: Fix SCSI boot duplication (Joel) - Armada-37xx: Fix DDR PHY clock divider values (Marek)
2020-04-22Merge tag 'mmc-2020-4-22' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini11-12/+12
- iproc_sdhci memory leak fix and enable R1B resp quirk - more mmc cmds and several mmc updates from Heinirich - Use bounce buffer for tmio sdhci - Alignment check for tmio sdhci
2020-04-22spl: mmc: Rename spl_boot_partition() to spl_mmc_boot_partition()Harald Seiler1-1/+1
This function is only relevant to the MMC driver so calling it spl_boot_partition() might be confusing. Rename it to spl_mmc_boot_partition() to make its purpose more clear (and bring it in line with spl_mmc_boot_mode()). Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler11-11/+11
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-22arm: mvebu: correct SPL boot configs for SPI/MMCJoel Johnson1-0/+12
Update mvebu SPL boot selection mechanism for the move to driver model usage by ensuring that the required driver support for SPI and MMC booting is available in SPL when the respective boot method is selected. Previously, all mvebu boards selected a boot method (implicitly MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used. This changes mvebu boot method selection to depend on SPL usage which resolves the issue with aarch64 boards which don't use SPL getting an implicit boot device selection resulting in unmet dependencies. The 32-bit arm boards do use SPL, but I'm led to conclude that most aren't intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have SPL_DM_SPI enabled in their defconfig even though they still implicitly select the SPI boot method. This also results in the new addition of SPL_GPIO_SUPPORT to helios4. The mainline dts for helios4 includes the cd-gpios entry for sdhci with identical addresses as the clearfog dts. I don't have a helios4 board to confirm, but based on the current source conclude that the board itself is either wired to pull the signal low for eMMC, or the default MMC boot isn't fully functional in mainline. In either case, as far as I can tell, including the GPIO support will at least cause no regression. Tested on SolidRun ClearFog devices. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-21Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini3-0/+23
- Backplane support and bug fixes
2020-04-20Merge branch '2020-04-17-master-imports'Tom Rini4-0/+55
- Further cleanups for 'make refcheckdocs' - Another BTRFS fix. - Support for automatic decompression of images with booti as well as unlz4 command for manual decompression.
2020-04-20Merge tag 'u-boot-amlogic-20200420' of ↵Tom Rini9-3/+176
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - enable DM_RNG on meson boards - fix SMBIOS info on Odroid-C2 - Fix video output on GXBB/GXL/GXM boards - add USB gadget support for GXL/GXM boards
2020-04-20Merge tag 'ti-v2020.07-rc1' of ↵Tom Rini8-24/+39
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot on am335x guardian board - Increase OPSI speed on AM65x and J721E devices - Use JTAD register for identifying K3 devices. - Update TI entry in MAINTAINERS file.
2020-04-20Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini36-26/+1377
2020-04-20arm: dts: meson-gxl: Add USB Gadget nodes for U-BootNeil Armstrong4-3/+30
Add the USB DWC2 node to u-boot specific dtsi files since Gadget support is not (yet) available in upstream Linux yet. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20arm: meson-gx: add board_usb_init()/cleanup() for USB gadgetNeil Armstrong1-0/+118
Add arch code to initialize USB Gadget mode using the DWC2 controller, and using the previously added set_mode() phy functions. [narmstrong: fixup board_usb_cleanup call to phy_meson_gxl_usb2_set_mode] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20phy: meson-gxl-usb: add set_mode call to force switch to peripheral modeNeil Armstrong1-0/+16
Add set_mode function in the Amlogic GXL PHYs that will be called by the arch code to switch PHYs from/to gadget mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20phy: add support for backplane kr modeFlorinel Iordache2-0/+18
Add generic support for backplane kr modes currently available: 10gbase-kr, 40gbase-kr4. Remove platform generic fixups (armv8/layerscape and powerpc) for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20armv8: ls1028a: define esdhc_status_fixupYinbo Zhu1-0/+5
This patch is to define esdhc_status_fixup function for ls1028a to disable SDHC1/SDHC2 status in device tree node if not selected. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-19arm: mach-k3: Use JTAD_ID register for device identificationLokesh Vutla3-18/+8
JTAG ID register is defined by IEEE 1149.1 for device identification. Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices instead of using SoC specific registers. [0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf [1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-18Add support for i.MXRT1020-EVK boardGiulio Benetti4-1/+249
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18ARM: dts: imxrt1020: add dtsi fileGiulio Benetti1-0/+133
Add dtsi file for i.MXRT1020. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18Add i.MXRT1020 supportGiulio Benetti1-0/+4
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18dts: imx: Add fixed-link property to HSC and DDC (imx53) devicesLukasz Majewski1-0/+7
Those two boards are supposed to be run with a single u-boot binary. There are notable differences though - HSC uses DSA switch (which phy_id == 0x0) and DCC (DP83848C). After the commit 3bf135b6c367 ("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices with phy_id == 0 are not created in U-Boot anymore. This caused regression on HSC. To fix this problem - the fec's 'fixed-link' node has been introduced and the phy_id is not assessed anymore. This approach works on both boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
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