aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2022-01-30sunxi: Fix H616 DRAM read calibration for dual rankJernej Skrabec1-1/+1
Although it isn't known what bit 0 in PHY reg 8 does, it's obvious that it has to be set before read calibration and cleared afterwards. This is already done for first rank, but not for second (copy & paste error.) Fix it. Fixes: f4317dbd06b6 ("sunxi: Add H616 DRAM support") Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-30sunxi: fix H616 DRAM ODT supportJernej Skrabec1-1/+1
Kconfig symbol is missing CONFIG_ prefix, so compiler will always skip ODT configuration. Fix symbol name. Fixes: f4317dbd06b6 ("sunxi: Add H616 DRAM support") Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-30sunxi: Add option to prevent booting on power plug-inChris Morgan1-0/+10
For sunxi boards with the AXP209, AXP221, AXP809, and AXP818 PMICs (plus possibly others, I only confirmed the datasheets for these), it is sometimes desirable to not boot whenever the device is plugged in. An example would be when using the NTC CHIP inside a PocketCHIP. This provides a configurable option to check if bit 0 of register 0 of the PMIC says it was powered because of a power button press (0) or a plug-in event (1). If the value is 1 and this option is selected, the device shuts down shortly after printing a message to console stating the reason why it's shutting down. Powering up the board with the power button is not affected. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> [Andre: reword to speak of boot, remove #ifdefs] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-30sunxi: gpio: Fix up pointer arithmeticAndre Przywara1-4/+4
The calls for flipping bits in the Allwinner pin controller registers were using unnecessarily complex pointer arithmetic. Improve readability by simplifying the expression. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-30sunxi: gpio: Add per-bank drive and pull settersSamuel Holland2-4/+18
The GPIO and pinctrl drivers need these setters for pin configuration. Since they are DM drivers, they should not be using hardcoded base addresses. Factor out variants of the setter functions which take a pointer to the GPIO bank's MMIO registers. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-30sunxi: gpio: Return void from setter functionsSamuel Holland2-8/+4
The return values of these functions are always zero, and they are never checked. Since they are not needed, remove them. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-01-28ARM: dts: k3-am642-sk: Disable cpsw_port1 in SPLVignesh Raghavendra2-19/+0
ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to download images on the same port, therefore there is no need to enable cpsw_port1. Disable the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-01-25sandbox: eth-raw: fix building with musl libraryHeinrich Schuchardt1-0/+2
The definition of struct udphdr in include netinet/udp.h in the musl library differs from the definition in the glibc library. To use the same definition with musl the symbol _GNU_SOURCE has to be defined. Reported-by: Milan P. Stanić <mps@arvanta.net> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Tested-by: Milan P. Stanić <mps@arvanta.net>
2022-01-25x86: Move acpi_get_rsdp_addr() ACPI tables to the writerSimon Glass1-21/+0
Move this over to use a writer file, moving the code from the x86 implementation. There is no need to store a separate variable since we can simply access the ACPI context. With this, the original monolithic x86 function for writing ACPI tables is gone. Note that QEMU has its own implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move device-specific ACPI tables to a writer functionSimon Glass1-2/+0
Move this over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: acpi: Update acpi_fill_csrt() to use acpi_ctxSimon Glass2-4/+6
Update this function to the newer style, so we can avoid passing and returning an address through this function. Also move this function out of the x86 code so it can be used by other archs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25x86: Move CSRT table to a writer functionSimon Glass1-49/+13
Move this table over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move TCPA table to a writer functionSimon Glass1-22/+16
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move MADT table to a writer functionSimon Glass1-11/+14
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move TPM2 table to a writer functionSimon Glass1-21/+18
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move SSDT table to a writer functionSimon Glass1-63/+30
Move this table over to use a writer function, moving the code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move FACP table into separate functionsSimon Glass6-45/+68
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25x86: Move FADT table to a writer functionSimon Glass1-7/+15
Move this table over to use a writer function, for x86 only. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move GNVS table to a writer functionSimon Glass1-37/+36
Move this table over to use a writer function, for x86 only. Handle the two cases Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move DSDT table to a writer functionSimon Glass1-42/+7
Move this table over to use a writer function, moving the code from the x86 implementation. Add a pointer to the DSDT in struct acpi_ctx so we can reference it later. Disable this table for sandbox since we don't actually compile real ASL code. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move FACS table to a writer functionSimon Glass1-24/+2
Move this table over to use a writer function, moving the code from the x86 implementation. Add a pointer to the DSDT in struct acpi_ctx so we can reference it later. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move base tables to a writer functionSimon Glass1-2/+0
Use the new ACPI writer to write the base tables at the start of the area, moving this code from the x86 implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Use the ACPI table writerSimon Glass1-17/+4
Use the new ACPI writer to write the ACPI tables. At present this is all done in one monolithic function. Future work will split this out. Unfortunately the QFW write_acpi_tables() function conflicts with the 'writer' version, so disable that for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: acpi: Split out context creation from base tablesSimon Glass1-3/+3
At present acpi_setup_base_tables() both sets up the ACPI context and writes out the base tables. We want to use an ACPI writer to write the base tables, so split this function into two, with acpi_setup_ctx() doing the context set, and acpi_setup_base_tables() just doing the base tables. Disable the writer's write_acpi_tables() function for now, to avoid build errors. It is enabled in a following patch. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25acpi: Move acpi_fill_header() to the generic headerSimon Glass1-1/+0
This function is not x86-specific so move it into the common header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25acpi: Use finer-grained control of ACPI-table generationSimon Glass2-1/+2
Rather than keying everything off ACPIGEN, use the main GENERATE_ACPI_TABLE option to determine whether the core ACPI code is included. Make sure these option are not enabled in SPL/TPL since we never generate tables there. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25sandbox: Allow building with GENERATE_ACPI_TABLESimon Glass2-0/+2
At present this option is missing a header file, a function prototype and the qfw driver needs a header included. Fix these problems so we can enable this option on sandbox. This will increase the build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Tidy up use of CONFIG_ACPIGENSimon Glass1-1/+1
This is enabled for quite a few boards which don't create ACPI tables. Tidy this up by dropping the option for some boards. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25arm: Allow supporting ACPI-table generationSimon Glass1-0/+1
Some ARM boards are using ACPI now. It seems that U-Boot should support this method. Add ARM to the list of archs which can generate ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move the acpi table to generic global_dataSimon Glass2-2/+0
Allow this to be used on any arch. Also convert to using macros so that we can check the CONFIG option in C code. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Allow any arch to generate ACPI tablesSimon Glass2-9/+2
These have sadly found their way to ARM now. Allow any arch to support generating ACPI tables. Disable this for the tools build. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-24configs: stm32mp15: Enable OF_BOARD flagPatrice Chotard1-0/+1
Since commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") board_fdt_blob_setup() is no more called on STM32MP platforms in trusted boot which hangs during boot process. Enable OF_BOARD flag to fix this issue. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-01-24stm32prog: add partition name in treat_partition_list error messagesPatrick Delaunay1-6/+6
Add the partition name and remove the line number in error messages of treat_partition_list() to provide correct information to user of STM32CubeProgrammer. The "line number" value was confusing because it is incorrect here; the index in part_array[] is not aligned with the line number in the parsed Layout file, because the empty lines and the lines beginning by '#' are skipped during the first parsing in parse_flash_layout(). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-24ARM: dts: stm32: Synchronize DHCOM DTs with Linux 5.15.12Marek Vasut10-424/+917
Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12"). There is no functional change to the resulting DTs. The eeprom0 alias and PHY reset GPIO are now reinstated in SoM u-boot dtsi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-01-24ARM: dts: stm32: Synchronize DHCOR DTs with Linux 5.15.12Marek Vasut9-224/+503
Synchronize DH DHCOR DTs with Linux commit 25960cafa06e ("Linux 5.15.12"). There is no functional change to the resulting DTs. The eeprom0 alias is now reinstated in SoM u-boot dtsi, the PHY reset GPIO is reinstated in AV96 u-boot dtsi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-01-24arm: dts: stm32mp15: alignment with v5.16Patrick Delaunay3-14/+15
Device tree alignment with Linux kernel v5.16-rc5 - ARM: dts: stm32: set otg-rev on stm32mp151 - ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151 - ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15 - ARM: dts: stm32: fix SAI sub nodes register range - ARM: dts: stm32: fix STUSB1600 Type-C irq level on stm32mp15xx-dkx Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-24stm32mp: correct the dependency for bootcount configsPatrick Delaunay1-1/+1
Default value for CONFIG_SYS_BOOTCOUNT_SINGLEWORD and CONFIG_SYS_BOOTCOUNT_ADDR are only needed when CONFIG_BOOTCOUNT_GENERIC is used. This patch avoids to define these configs when an other bootcount backend is activated, for example for CONFIG_BOOTCOUNT_ENV. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-24stm32mp: remove the bootcount activationPatrick Delaunay1-8/+0
Today the bootcount is not managed by the Linux kernel for STM32MP15 as we don't have driver to update the used backup register in TAMP and the recovery command still executes the normal bootcmd with 'altbootcmd=run bootcmd'. So the bootcount feature is never used, the config CONFIG_BOOTCOUNT_LIMIT and the associated environment variable 'altbootcmd' can be removed to reduce the U-Boot size. Each boards can re-enable this feature later in their defconfig, if it is needed, with the expected backend, for example CONFIG_BOOTCOUNT_GENERIC or CONFIG_BOOTCOUNT_ENV. CC: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-24ARM: dts: stm32: Add DFU support for DHCOR recoveryMarek Vasut1-0/+42
This patch configures U-Boot SPL for DHCOR SoM to permit DFU upload of SPL and subsequent u-boot.itb for recovery or commissioning purposes. To start U-Boot on DHCOR based board, e.g. Avenger96, proceed as follows: - Install dfu-util on the host PC (in debian this is package 'dfu-util') - Power off the Avenger96 board. - Connect both USB-serial console and USB-OTG microB ports to host PC. - Switch Avenger96 to USB boot mode -- BOOT0..2 switches all set to 0. - Power on the Avenger96 board. - Verify using '$ dmesg' that a new device has been detected as follows: New USB device found, idVendor=0483, idProduct=df11, bcdDevice= 2.00 New USB device strings: Mfr=1, Product=2, SerialNumber=3 Product: DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000 Manufacturer: STMicroelectronics - Upload U-Boot SPL: $ dfu-util -a 1 -D u-boot-spl.stm32 - Upload U-Boot proper: $ dfu-util -a 0 -D u-boot.itb - At this point, SPL will wait for user to press "Ctrl-C" on serial console. When ready to interact with U-Boot, press Ctrl-C to start the bootloader. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-24arm: stm32mp: Fix USB boot device reportMarek Vasut1-1/+1
In case the SoC reports the boot device type is USB, it means the SPL was loaded via BootROM DFU mode. Currently the spl_boot_device() returns boot device as USB host, change it to DFU instead, so the SPL can continue the DFU boot and load U-Boot via DFU. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-01-23Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini1-0/+9
- rzg2_beacon updates
2022-01-22arm: dts: rz-g2-beacon-u-boot: Enable pinmux for QSPIAdam Ford1-0/+9
When booting from QSPI, the boot ROM appears to mux the QSPI pins, but it's not guaranteed to be setup when booting from eMMC. Fix this by explicitly configuring the pinmux. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-01-22Merge tag 'efi-2022-04-rc1-2' of ↵WIP/22Jan2022Tom Rini1-0/+1
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-04-rc1-2 Documentation: * describe printf() format codes UEFI * enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048 General * simplify printing short texts for GUIDs * provide a unit test for printing GUIDs
2022-01-21Convert CONFIG_AT91_EFLASH to KconfigPatrick Delaunay1-0/+8
This converts the following to Kconfig: CONFIG_AT91_EFLASH Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-01-21Convert CONFIG_BOOTP_SERVERIP to KconfigSimon Glass1-0/+1
This converts the following to Kconfig: CONFIG_BOOTP_SERVERIP Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-21Convert CONFIG_TIMESTAMP to KconfigSimon Glass4-0/+5
This converts the following to Kconfig: CONFIG_TIMESTAMP Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/20Jan2022Tom Rini9-74/+107
- fdt_support: Add fdt_for_each_node_by_compatible() helper macro (Marek) - turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali) - pci_mvebu: Add support for Kirkwood PCIe controllers (Pali) - SPL: More verifications for kwbimage in SPL (Pali) - mvebu: Remove comphy_update_map() (Pali) - Minor misc stuff
2022-01-20Merge tag 'doc-2022-04-rc1' of ↵Tom Rini159-849/+849
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request doc-2022-04-rc1 Replace @return by Return: in code comments.
2022-01-20arm: mvebu: spl: Fix 100 column exceedsMarek Behún1-2/+4
Fix 100 column exceeds in arch/arm/mach-mvebu/spl.c. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-20arm: mvebu: spl: Use IS_ENABLED() instead of #ifdef where possibleMarek Behún1-15/+8
Use the preferred if (IS_ENABLED(X)) instead of #ifdef X where possible. There are still places where this is not possible or is more complicated to convert in this file. Leave those be for now. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-10-18 05:33:37 +0000