aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2017-07-18Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini117-98/+100
2017-07-12Merge git://www.denx.de/git/u-boot-marvellTom Rini3-0/+469
2017-07-12imx: reorganize IMX code as other SOCsStefano Babic117-90/+92
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12mx6sabreauto: Update to SPL only modeVanessa Maegima1-3/+3
As mx6sabreauto supports SPL now, all variants can boot using the same defconfig. This patch: - Removes non-SPL targets. - Renames target to mx6sabreauto_defconfig. - Renames folder and board files to mx6sabreauto. - Updates MAINTAINERS, Makefile and Kconfig accordingly. - Removes .cfg files. - Adds a README with instructions to build and flash SPL and u-boot.img. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12mx6qsabreauto: Add SPL supportVanessa Maegima1-0/+1
Add support for mx6q, mx6dl and mx6qp sabreauto boards in SPL. Retrieved the mx6q DCD table from: board/freescale/mx6qsabreauto/imximage.cfg Retrieved the mx6dl DCD table from: board/freescale/mx6qsabreauto/mx6dl.cfg Retrieved the mx6qp DCD table from: board/freescale/mx6qsabreauto/mx6qp.cfg Flashed SPL and u-boot.img to an SD card and could successfully boot it on mx6q, mx6qp and mx6dl sabreauto boards. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12mx6: soc: Move mxs_dma_init() into the mxs nand driverFabio Estevam1-5/+0
Currently the following build error is seen when a board using MMC SPL is built and the MXS nand driver is also selected: arch/arm/cpu/armv7/built-in.o: In function `arch_cpu_init': arch/arm/cpu/armv7/mx6/soc.c:432: undefined reference to 'mxs_dma_init' On mx6 the only user of mxs_dma_init() is the mxs nand driver, so move it there. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12imx: mx6ull: fix USB bmode for i.MX 6UL and 6ULLStefan Agner1-0/+4
i.MX 6UL and 6ULL have different boot device capabilities and use therefor use a different boot device selection table than other i.MX 6 devices. Particularly, the value which has been used so far (b0001) is assigned to QSPI boot for these two devices. There is no common reserved value for all i.MX 6devices. Use b0010 for i.MX 6UL and 6ULL via compile time ifdef. Reported-by: Joël Esponde <joel.esponde@honeywell.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Joël Esponde <joel.esponde@honeywell.com>
2017-07-12marvell: armada385: Add the Turris Omnia boardMarek Behún1-0/+22
The Turris Omnia is a open-source router created by CZ.NIC. The code is based on the Marvell/db-88f6820-gp by Stefan Roese with modifications from Tomas Hlavacek in the CZ.NIC turris-omnia-uboot repository, which can be found at https://gitlab.labs.nic.cz/turris/turris-omnia-uboot By default, the Turris Omnia uses btrfs as the main and only filesystem, and also loads kernel and device tree from this filesystem. Since U-Boot does not yet support btrfs, you should not flash your Turris Omnia board with this unless you know what you are doing. Signed-off-by: Tomas Hlavacek <tomas.hlavacek@nic.cz> Signed-off-by: Marek Behun <marek.behun@nic.cz> create mode 100644 board/CZ.NIC/turris_omnia/Makefile create mode 100644 board/CZ.NIC/turris_omnia/kwbimage.cfg create mode 100644 board/CZ.NIC/turris_omnia/turris_omnia.c create mode 100644 configs/turris_omnia_defconfig create mode 100644 include/configs/turris_omnia.h Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12arch/arm/dts: Add Turris Omnia device treeMarek Behún2-0/+447
This device tree is taken from mainline Linux kernel commit 7b7db5ab. Added is also a -u-boot.dtsi file with these additions: - aliases for I2C and SPI devices are added, because i2cmux and SPI flash doesn't work otherwise - spi_flash node has been added so that the new DM API works - the ATSHA204A node is added in the i2c@5 node - "u-boot,dm-pre-reloc"s are added in needed nodes for SPL build to work correctly Signed-off-by: Marek Behun <marek.behun@nic.cz> create mode 100644 arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi create mode 100644 arch/arm/dts/armada-385-turris-omnia.dts Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-11am33xx: board: Refactor USB initialization into separate functionAlexandru Gagniuc1-4/+10
The declaration of otg*_plat and otg*_board_data is guarded by CONFIG_USB_MUSB_*, but their use in arch_misc_init is not. The ifdef flow goes something like: if (CONFIG_USB_MUSB_* && other_conditions) declare usb_data if (other_conditions) use usb_data Thus when CONFIG_USB_MUSB_* is not declared, we try to use the data structures, but these structures aren't defined. To fix this, move the USB initialization code into the same #ifdef which guards the declaration of the data structures. Since the DM_USB vs legacy cases are completely different, use two versions of arch_misc_init(), for readability. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-11ARM: ti816x: Fix enabling GPIO0, enable GPIO1 as wellTom Rini1-1/+7
The TI816x has 2 GPIO banks. For bank 0 we had been clearing the enable bit when setting BIT(8). Correct this by setting it to BIT(1) | BIT(8) after we set and wait for BIT(1) (aka PRCM_MOD_EN). Enable GPIO1 as well so that when CMD_GPIO is enabled it won't crash probing the second bank. Enable CMD_GPIO on ti816x_evm. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-11armv8: fsl-layerscape: use get_nand_dev_by_index()Grygorii Strashko1-6/+9
As part of preparation for nand DM conversion the new API has been introduced to remove direct access to nand_info array. So, use it here instead of accessing to nand_info array directly. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2017-07-11Merge git://git.denx.de/u-boot-dmTom Rini42-41/+211
2017-07-11Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini45-335/+3317
2017-07-11tegra: fdt: Ensure that the console UART is enabledSimon Glass17-0/+68
Many tegra boards have the console UART node disabled. With livetree this prevents serial from working since it does not 'force' the console to be bound. Updates the affected boards to fix this error. The boards were checked with: for b in $(grep tegra boards.cfg |grep -v integrator | \ awk '{print $7}' | sort); do echo $b; fdtgrep -c nvidia,tegra20-uart b/$b/u-boot.dtb |grep okay; done Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
2017-07-11tegra: Show a debug message if the LCD PMIC fails to startSimon Glass1-1/+3
This error condition should have a debug() message. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
2017-07-11tegra: Fix up include file orderingSimon Glass2-16/+10
Update these two files so include files in the right order. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
2017-07-11sandbox: Stop printing platdata at the start of SPLSimon Glass1-11/+0
Currently we have code which prints out platform data at the start of SPL. Now that we have tests for dtoc this is probably not necessary. Drop it. Update test_ofplatdata to check for empty output since it is useful to check that sandbox_spl works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-11sandbox: Enable more console optionsSimon Glass1-0/+1
Enable the pre-console buffer, displaying the model and post-relocation console announce on sandbox. Also add a model name to the device tree. This allows testing of these features. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2017-07-11x86: Move link to use driver model for SCSISimon Glass1-1/+21
As a demonstration of how to use SCSI with driver model, move link over to use this. This patch needs more work, but illustrates the concept. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11dm: scsi: Document and rename the scsi_scan() parameterSimon Glass2-3/+3
The 'mode' parameter is actually a flag to determine whether to display a list of devices found during the scan. Rename it to reflect this, add a function comment and adjust callers to use a boolean. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11dm: scsi: Add a device pointer to scan_exec(), scsi_bus_reset()Simon Glass1-1/+3
With driver model these functions need a device pointer. Add one even when CONFIG_DM_SCSI is not defined. This avoids having ugly conditional function prototypes, When CONFIG_DM_SCSI is not defined we can just ignore the pointer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11sata: Move drivers into new drivers/ata directorySimon Glass1-1/+1
At present we have the SATA and PATA drivers mixed up in the drivers/block directory. It is better to split them out into their own place. Use drivers/ata which is what Linux does. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11Kconfig: Add CONFIG_SATA to enable SATASimon Glass4-6/+6
At present CONFIG_CMD_SATA enables the 'sata' command which also brings in SATA support. Some boards may wish to enable SATA without the command. Add a separate CONFIG to permit this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11Convert CONFIG_CMD_SATA to KconfigSimon Glass5-0/+53
This converts the following to Kconfig: CONFIG_CMD_SATA Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11Convert CONFIG_SCSI to KconfigSimon Glass9-1/+20
This converts the following to Kconfig: CONFIG_SCSI Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11rockchip: dts: rk3328: add aliases for mmc controllerKever Yang1-0/+3
Add aliases for mmc controller to get a fixed order with emmc at index 0 and sdmmc at index 1. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11dm: core: Test uclass_first/next_device() on probe failureSimon Glass1-0/+19
Add some tests which check the behaviour of uclass_first_device() and uclass_next_device() when probing of a device fails. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-11rockchip: rk3288: Add pinctrl support for the gmac ethernet interfaceSjoerd Simons1-0/+178
Add support for the gmac ethernet interface to pinctrl. This hardcodes the setup to match that of the firefly and Radxa Rock2 boards, using the RGMII phy mode for gmac interface and GPIO4B0 as the phy reset GPIO. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3328-evb: add sdmmc-pwren regulatorKever Yang1-0/+8
Use fixed regulator for sdmmc-pwren for sdmmc power. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: Add basic support for phyCORE-RK3288 SoM based carrier boardWadim Egorov5-0/+851
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC. The module can be connected to different carrier boards. It can be also equipped with different RAM, SPI flash and eMMC variants. The Rapid Development Kit option is using the following setup: - 1 GB DDR3 RAM (2 Banks) - 1x 4 KB EEPROM - DP83867 Gigabit Ethernet PHY - 16 MB SPI Flash - 4 GB eMMC Flash Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination with the phyCORE-RK3288 System on Module. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3399: control vbus of typec by fixed regulatorMeng Dongyang1-2/+14
Add fixed regulator for the port of typec0 and typec1 to control vbus instead of gpio. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3328: support and enable dwc2Meng Dongyang2-0/+24
Enable dwc2 controller and add fixed regulator for dwc2 controller to control vbus. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3328: add fixed regulator node for xhciMeng Dongyang1-1/+10
The driver changes gpio to fixed regulator to control vbus, so add fixed regulator node in DTS for xhci driver. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3036: sync os_reg2 define with other socKever Yang1-2/+3
Rockchip using the same bit definition for dram info and write to os_reg, the col and bw info is not correct and let's fix it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: pwm: fix the register layout for the PWM controllereric.gao@rock-chips.com1-1/+1
According to rk3288 spec, the pwm register order is: PWM_PWM0_CNT, PWM_PWM0_PERIOD_HPR, PWM_PWM0_DUTY_LPR, PWM_PWM0_CTRL but the source code's order is: struct rk3288_pwm { u32 cnt; u32 duty_lpr; u32 period_hpr; u32 ctrl; }; So, correct it here. It is the same as RK3399. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Edited the commit message: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: firefly-rk3399: dts: enable sdmmc deviceKever Yang1-0/+7
Enable sdmmc device and add the spl boot device sequence. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3328: dtsi use max-frequency for mmc nodeKever Yang1-4/+4
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3288: dtsi use max-frequency for mmc nodeKever Yang1-4/+4
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3036: dtsi use max-frequency for mmc nodeKever Yang1-1/+1
Since the 'clock-freq-min-max' is deprecated, we use max-frequency. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: add evb_rk3229 boardKever Yang1-0/+1
evb_rk3229 is a RK3229 based board, with: - 8GB eMMC; - 1GB DDR SDRAM; - 2 USB2.0 HOST port; - 1 MAC port; - 1 HDMI port; - IR; - WiFi; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add basic soc supportKever Yang9-0/+311
Enable soc support for SPL and U-boot skeleton. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add dts fileKever Yang2-0/+787
The dts files are from kernel and with modify to adapt U-Boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add pinctrl driverKever Yang1-0/+519
Add init pinctrl driver support for: - i2c; - spi; - uart; - pwm; - emmc/sdmmc; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk322x: add clock driverKever Yang1-0/+215
Add clock driver init support for: - cpu, bus clock init; - emmc, sdmmc clock; - ddr clock; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Fixed format specified (%x -> %p) in clk_rk322x.c: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: correct the bank0 ram sizeKever Yang3-0/+39
The bank0 ram size should be the DRAM size minus reserved size, the DRAM size may be 1GB, 2GB, 4GB, we can not hard code it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added DECLARE_GLOBAL_DATA_PTR for RK3328, RK3368 and RK3399: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3368: add dmc nodeKever Yang1-0/+7
Add dmc node to enable sdram driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: dts: rk3328: add dmc nodeKever Yang1-0/+7
Add a dmc node for sdram driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3368: add sdram driver for U-BootKever Yang3-1/+64
Add sdram driver in U-Boot for get the correct sdram size from sys_reg, so that U-Boot can co-work with Rockchip loader or SPL to get different dram capability and then tell the kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11rockchip: rk3328: add sdram driver in U-BootKever Yang2-0/+61
Add sdram driver in U-Boot for get the correct sdram size from sys_reg, so that U-Boot can co-work with Rockchip loader or SPL to get different dram capability and then tell the kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
generated by cgit v1.1 at 2024-08-15 05:15:48 +0000