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2023-04-19ARM: dts: stm32: add FMC support on STM32MP13x SoC familyChristophe Kerello1-0/+33
Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-19ARM: dts: stm32: Add QSPI support on STM32MP13x SoC familyPatrice Chotard1-0/+15
Add QSPI support on STM32MP13x SoC family Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-04-17Merge tag 'u-boot-amlogic-20230417' of ↵WIP/17Apr2023Tom Rini20-427/+2765
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add initial support for BPI-CM4 - Spring Cleanup of Amlogic board documentation - add support for BananaPi M2-Pro - add support for BananaPi M2S - add support for Radxa Zero2 - add support for WeTek Hub and WeTek Play2 - switch LibreTech-CC v2 and WeTek Core2 to EE powerdomain - add support for Beelink GT1 Ultimate
2023-04-17ARM: dts: add support for Beelink GT1 UltimateKarl Chan3-0/+99
Import the device-tree from linux-amlogic/for-next (Linux 6.3-rc1). Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Karl Chan <exxxxkc@getgoogleoff.me> Link: https://lore.kernel.org/r/f5a8db4e-b2d0-e00a-cc4f-01a4f794c761@yahoo.com [narmstrong: fixed imported dt file] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: dts: add support for WeTek Hub and WeTek Play2Christian Hewitt5-0/+484
Import the dts files from linux-amlogic/for-next (Linux 6.4-rc1) and add the old PHY reset bindings for dwmac to the u-boot.dtsi until we support the new bindings in the PHY node. Without this the PHY is not functional in u-boot or Linux. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230323143142.780306-13-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: dts: add support for Radxa Zero2Christian Hewitt3-0/+497
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1) to support the Radxa-Zero2 board. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230323143142.780306-10-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: dts: add support for BananaPi M2SChristian Hewitt5-0/+576
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1) and omit the NPU node from the A311D board variant dts as this is not supported under U-Boot. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230323143142.780306-7-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: dts: add support for BananaPi M2-ProChristian Hewitt5-428/+550
Import the board dts from the linux-amlogic/for-next (6.4-rc1) branch. This involves spliting the BPI-M5 dts into a dtsi and then reusing this for the M2-Pro. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230323143142.780306-4-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: meson: Add initial support for BPI-CM4 module with BPI-CM4IO baseboardNeil Armstrong1-0/+6
Add support for both the BananaPi BPI-CM4 module and the BananaPi baseboard which is compatible with the RaspberryPi CM4IO baseboard. The BananaPi BPI-CM4 module follows the CM4 specifications at [1], but with a single HDMI port and a single DSI output. The current CM4IO baseboard DT should work fine on the Raspberry CM4 baseboard and other derivatives baseboards, but proper DT should be written for other baseboards. [1] https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf Link: https://lore.kernel.org/r/20230307-u-boot-cm4-v1-2-43f5a393cd37@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-17ARM: dts: import initial DT for BPI-CM4 module with BPI-CM4IO baseboardNeil Armstrong3-0/+554
Import initial support for BPI-CM4 module with BPI-CM4IO baseboard from the Linux submission applied at [1]. The BananaPi BPI-CM4 module follows the CM4 specifications at [2], but with a single HDMI port and a single DSI output. The current CM4IO baseboard DT should work fine on the Raspberry CM4 baseboard and other derivatives baseboards, but proper DT should be written for other baseboards. [1] https://git.kernel.org/amlogic/c/0262f2736978b1763363224698f47112a148dab0 [2] https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf Link: https://lore.kernel.org/r/20230307-u-boot-cm4-v1-1-43f5a393cd37@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-04-15arch: m68k: Add QEMU specific RAMBAR workaroundMarek Vasut2-3/+12
The QEMU emulation of m68k does not support RAMBAR accesses, add Kconfig option which inhibits those accesses, so that U-Boot can be started in m68k QEMU for CI testing purpopses until QEMU emulation improves. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-15arch: m68k: Introduce trivial PIT based timerMarek Vasut2-2/+58
The QEMU emulation of m68k does not support DMA timer, the only timer that is supported is the PIT timer. Implement trivial PIT timer support for m68k. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-15arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMRMarek Vasut7-23/+24
There is an existing CONFIG_MCFTMR Kconfig symbol, use it and drop all other instances of CFG_MCFTMR. This duality is likely a result of bogus conversion to Kconfig. Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-14Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/14Apr2023Tom Rini4-3/+26
- mvebu: Boot support for 4K Native disks (Pali) - a38x: Perform DDR training sequence again for 2nd boot (Tony)
2023-04-13arm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disksPali Rohár3-0/+18
Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block size of SATA disk. This information is used during building of SATA kwbimage and must be correctly set, otherwise BootROM does not load SPL. For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
2023-04-13arm: mvebu: spl: Do not hardcode SATA block size to 512Pali Rohár1-3/+8
Find SATA block device by blk_get_devnum_by_uclass_id() function and read from it the real block size of the SATA disk. Signed-off-by: Pali Rohár <pali@kernel.org>
2023-04-12sunxi: arm64: boot0.h: runtime check for RVBAR addressAndre Przywara2-4/+24
Some SoCs of the H616 family use a die variant, that puts some CPU power and reset control registers at a different address. There are examples of two instances of the same board, using different die revisions of the otherwise same H313 SoC. We need to write to a register in that block *very* early in the SPL boot, to switch the core to AArch64. Since the devices are otherwise indistinguishable, let the SPL code read that die variant and use the respective RVBAR address based on that. That is a bit tricky, since we need to do that in hand-coded AArch32 machine language, shared by all 64-bit SoCs. To avoid build dependencies in this mess, we always provide two addresses to choose from, and just give identical values for all other SoCs. This allows the same code to run on all 64-bit SoCs, and controls this switch behaviour purely from Kconfig. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-12sunxi: boot0.h: allow RVBAR MMIO address customisationAndre Przywara2-5/+14
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need to program the 64-bit start code address into an MMIO mapped register that shadows the architectural RVBAR register. This address is SoC specific, with just two versions out there so far. Now a third address emerged, on a *variant* of an existing SoC (H616). Change the boot0.h start code to make this address a Kconfig selectable option, to allow easier maintenance. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-12sunxi: Add TPR2 parameter for H616 DRAM driverJernej Skrabec4-24/+75
It turns out that some H616 and related SoCs (like H313) need TPR2 parameter for proper working. Add it. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Parameterize some of H616 DDR3 timingsJernej Skrabec1-4/+5
Currently twr2rd, trd2wr and twtp are constants, but according to vendor driver they are calculated from other values. Do that here too, in preparation for later introduction of new parameter. While at it, introduce constant for t_wr_lat, which was incorrectly calculated from tcl before. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Parameterize "unknown feature" in H616 DRAM driverJernej Skrabec3-11/+43
Part of the code, previously known as "unknown feature", also doesn't have constant values. They are derived from TPR0 parameter in vendor DRAM code. Let's move that code to separate function and introduce TPR0 parameter here too, to ease adding new boards. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Parameterize bit delay code in H616 DRAM driverJernej Skrabec3-49/+161
These values are highly board specific and thus make sense to add parameter for them. To ease adding support for new boards, let's make them same as in vendor DRAM settings. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Make bit delay function in H616 DRAM code voidJernej Skrabec1-3/+1
Mentioned function result is always true and result isn't checked anyway. Let's make it void. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Always configure ODT on H616 DRAMJernej Skrabec2-3/+2
Vendor H616 DRAM code always configure part which we call ODT configuration. Let's reflect that here too. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Convert H616 DRAM options to single settingJernej Skrabec3-129/+115
Vendor DRAM settings use TPR10 parameter to enable various features. There are many mores features that just those that are currently mentioned. Since new will be added later and most are not known, let's reuse value from vendor DRAM driver as-is. This will also help adding support for new boards. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: parameterize H616 DRAM ODT valuesJernej Skrabec3-22/+55
While ODT values for same memory type are similar, they are not necessary the same. Let's parameterize them and make parameter same as in vendor DRAM settings. That way it will be easy to introduce new board support. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: cosmetic: Fix H616 DRAM driver code styleJernej Skrabec1-37/+37
Fix code style for pointer declaration. This is just cosmetic change to avoid checkpatch errors in later commits. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12sunxi: Fix write to H616 DRAM CR registerJernej Skrabec1-1/+1
Vendor DRAM code actually writes to whole CR register and not just sets bit 31 in mctl_ctrl_init(). Just to be safe, do that here too. Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulatorSamuel Holland1-0/+17
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no regulator exists in its device tree. Add the regulator, so USB will continue to work when the PHY driver switches to using the regulator uclass instead of a GPIO. Update the device tree here because it does not exist in Linux. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-11m68k: dts: add i2c nodesAngelo Dureghello23-0/+272
Add all the i2c nodes for each family, and add specific i2c overwrites in the related board-specific dts. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-11i2c: fsl_i2c: fix m68k transfertsAngelo Dureghello1-0/+10
This driver is actually used for powerpc and m68k/ColdFire. On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6, interrupt enabled) is not set appropriately before each transfert. As a result, the transfert hangs forever waiting for IIEN. This patch set IIEN before each transfert, while considering this fix as not harming powerpc arch. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-11m68k: mcf5441x: fix CONFIG_SYS_FSL_I2C definitionAngelo Dureghello1-3/+2
Fix CONFIG_SYS_FSL_I2C to correct name CONFIG_SYS_I2C_FSL. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-11m68k: move CONFIG_SYS_I2C to CFG_ namespaceAngelo Dureghello1-3/+3
Move CONFIG_SYS_I2C_X to CFG_ namespace. This is a preliminary step to move to dm i2c. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-08Merge tag 'video-20230407' of ↵Tom Rini6-0/+283
https://source.denx.de/u-boot/custodians/u-boot-video - fix building sandbox without SDL - improve tegra DC driver to work with panel ops and implement native 180 degree panel rotation support - add T30 support to tegra DC driver - add DSI driver (based on mainline Linux one with minor adjustments, only T30 tested) - add get_display_timing ops to simple panel driver - extend simple panel driver to use it for MIPI DSI panels which do not require additional DSI commands for setup
2023-04-07Merge branch 'master_sh/gen4/initial' of ↵WIP/07Apr2023Tom Rini23-20/+3574
https://source.denx.de/u-boot/custodians/u-boot-sh - Initial R-Car Generation 4 support
2023-04-07video: tegra20: add DSI controller driverSvyatoslav Ryhel1-0/+217
Adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Driver is heavily based on mainline Tegra DSI and re-uses much of its features. Only T30 is supported for now but T20 support can be added if any supported devices will be found. Driver is wrapped as panel driver since Tegra DC driver supports only panel drivers calls. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: pass DC regmap to internal devicesSvyatoslav Ryhel1-0/+8
Internal video devices like DSI and HDMI controllers require sending commands into DC register field. To make this available, lets create platform data, which is restricted to pass DC regmap only to pre-defined devices. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07tegra: lcd: video: integrate display driver for t30Marcel Ziswiler3-0/+50
On popular request make the display driver from T20 work on T30 as well. Turned out to be quite straight forward. However a few notes about some things encountered during porting: Of course the T30 device tree was completely missing host1x as well as PWM support but it turns out this can simply be copied from T20. The only trouble compiling the Tegra video driver for T30 had to do with some hard-coded PWM pin muxing for T20 which is quite ugly anyway. On T30 this gets handled by a board specific complete pin muxing table. The older Chromium U-Boot 2011.06 which to my knowledge was the only prior attempt at enabling a display driver for T30 for whatever reason got some clocking stuff mixed up. Turns out at least for a single display controller T20 and T30 can be clocked quite similar. Enjoy. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07sandbox: video: Fix building without SDLSimon Glass1-0/+8
This is currently broken. If SDL is not installed, SANDBOX_SDL becomes false and build errors are generated, e.g.: test/dm/video.c:424: undefined reference to `sandbox_sdl_set_bpp' Fix it by making the function return an error in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-07ARM: renesas: Add R8A779G0 V4H White Hawk board codeHai Pham3-1/+51
Add board code for R8A779G0 V4H White Hawk board. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Synchronize configuration symbols which are now switched to Kconfig Mallocate gd->bd->bi_boot_params, i.e. drop the assignment Sort headers, use clrbits_le32(), use BIT macros where appropriate Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07ARM: renesas: Add R8A779G0 V4H Kconfig entry and PRR IDHai Pham3-0/+8
Add Kconfig entry and PRR ID to support R8A779G0 V4H SoC. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Update commit message]
2023-04-07ARM: dts: renesas: Add R8A779G0 V4H White Hawk DTsTho Vu4-0/+431
Add DTs for R8A779G0 V4H White Hawk CPU and BreakOut boards. Based on Linux next 20230228 DTs up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tho Vu <tho.vu.wh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228, update commit message Rename DTs to match Linux, which has dash between white-hawk]
2023-04-07ARM: dts: renesas: Add R8A779G0 V4H DT extrasHai Pham1-0/+28
Add R8A779G0 V4H DT extras for U-Boot. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Update compatible string to match latest upstream]
2023-04-07ARM: dts: renesas: Add R8A779G0 V4H DTPhong Hoang1-0/+1355
Add initial DT support for R8A779G0 (R-Car V4H). Based on Linux next commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228, update commit message]
2023-04-07ARM: renesas: Add R8A779F0 S4 Spider board codeHai Pham3-1/+51
Add board code for R8A779F0 S4 Spider board. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Synchronize configuration symbols which are now switched to Kconfig Mallocate gd->bd->bi_boot_params, i.e. drop the assignment Sort headers, use clrbits_le32(), use BIT macros where appropriate Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07ARM: renesas: Add R8A779F0 S4 Kconfig entry and PRR IDHai Pham3-0/+8
Add Kconfig entry and PRR ID to support R8A779F0 S4 SoC. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Update commit message]
2023-04-07ARM: dts: renesas: Add R8A779F0 S4 Spider DTsHai Pham3-0/+319
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards. Based on Linux next 20230228 DTs up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228, update commit message]
2023-04-07ARM: dts: renesas: Add R8A779F0 S4 DT extrasHai Pham1-0/+28
Add R8A779F0 S4 DT extras for U-Boot. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Update compatible string to match latest upstream]
2023-04-07ARM: dts: renesas: Add R8A779F0 S4 DTHai Pham1-0/+1179
Add initial DT for R8A779F0 S4 SoC. Based on Linux next commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228, update commit message]
2023-04-07ARM: rmobile: Turn R-Car V3U into R-Car Gen4Hai Pham3-15/+23
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family [1]. Hence reflect this in related files, select appropriate configuration options and split DT build into its own GEN4 entry. [1] https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Deduplicate DTC_FLAGS addition using RCAR_64 symbol Update commit message]
generated by cgit v1.1 at 2024-09-17 02:42:33 +0000