aboutsummaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass10-15/+15
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass25-84/+84
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01dtoc: Support widening a bool valueSimon Glass1-0/+2
At present if we see 'ranges' property (with no value) we assume it is a boolean, as per the devicetree spec. But another node may define 'ranges' with a value, forcing us to widen it to an int array. At present this is not supported and causes an error. Fix this and add some test cases. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Tom Rini <trini@konsulko.com>
2021-08-01sandbox: Reduce keyed autoboot delaySimon Glass3-0/+28
The autoboot tests are a recent addition to U-Boot, providing much-needed coverage in this area. A side effect of the keyed autoboot test is that this feature is enabled in sandbox always. This changes the autoboot prompt and confuses the pytests. Some tests become slower, for example the vboot tests take about 27s now instead of 3s. We don't actually need this feature enabled to be able to run the tests. Add a switch to allow sandbox to turn it on and off as needed. Use this in the one test that needs it. Add a command-line flag in case this is desired in normal use. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 25c8b9f298e ("test: add first autoboot unit tests") Reviewed-by: Steffen Jaeckel <jaeckel-floss@eyet-services.de>
2021-07-31Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2-2/+13
- Move the PSCI runtime code for H3/A23/A33 into SRAM - Pick the environment from the actual MMC boot device (SD card vs. eMMC) - Plus a small improvement from Icenowy, just for good measure.
2021-08-01sunxi: decide the inclusion of SCP by SCP_ADDR existenceIcenowy Zheng1-2/+2
There are more Allwinner SoCs that do not have a SCP now. When there's no SCP_ADDR macro defined, we can assume there's no SCP available. Drop the scp part of FIT description when SCP_ADDR does not exist. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-08-01sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2Samuel Holland1-0/+11
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure monitor code (providing PSCI runtime services). And while those SoCs do not have the secure SRAM B like older SoCs, there is enough (secure) SRAM A2 to put the monitor code and data in there instead. Follow the design of 64-bit SoCs and use the first part for the monitor, and the last 16 KiB for the SCP firmware. With this change, the monitor no longer needs to reserve a region in DRAM. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: amend commit message, fix R40 and V3s build] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-31arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage headerPali Rohár2-22/+205
Now that proper load and execution addresses are set in v1 kwbimage we can use it for loading and booting U-Boot proper. Use the new spl_parse_board_header() function to implement parsing the kwbimage v1 header. Use information from this header to locate offset and size of the U-Boot proper binary, instead of using the legacy U-Boot header which is prepended to the U-Boot proper binary stored at fixed offset. This has the advantage that we do not need to relay on legacy U-Boot header anymore and therefore U-Boot proper binary can be stored at any offset, as is the case when loading & booting U-Boot proper by BootROM. The CONFIG_SYS_U_BOOT_OFFS option is therefore not used by SPL code anymore. Also allow to compile U-Boot SPL without CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_MMC_SUPPORT or CONFIG_SPL_SATA_SUPPORT set. In this case BootROM is used for loading and executing U-Boot proper. This reduces the size of U-Boot's SPL image. By default these config options are enabled and so BootROM loading is not used. In some cases BootROM reads from SPI NOR at lower speed than U-Boot SPL. So people can decide whether they want to have smaller SPL binary at the cost of slower boot. Therefore dependency on CONFIG_SPL_DM_SPI, CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_SPI_LOAD, CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_DM_GPIO, CONFIG_SPL_DM_MMC, CONFIG_SPL_GPIO_SUPPORT, CONFIG_SPL_LIBDISK_SUPPORT, CONFIG_SPL_MMC_SUPPORT, CONFIG_SPL_SATA_SUPPORT and CONFIG_SPL_LIBDISK_SUPPORT is changed from strict to related "imply" (which can be selectivelly turned off and causes booting via BootROM). Options CONFIG_SYS_SPI_U_BOOT_OFFS, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET have to to be set to zero as they define the location where kwbimage header starts. It is the location where BootROM expects start of the kwbimage from which it reads, parses and executes SPL part. The same applies to option CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR, which has to be set to one. Update all config files to set correct values of these options and set CONFIG_SYS_U_BOOT_OFFS to the correct value - the offset where U-Boot proper starts. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31arm: mvebu: Use U-Boot's SPL BootROM framework for booting from NAND/UARTPali Rohár1-23/+24
Current code uses hack in board_init_f() which calls return_to_bootrom() to skip U-Boot SPL code and return back to BootROM to load U-Boot via UART or from NAND. This change migrates that hack from the board_init_f() function and changes it to return BOOT_DEVICE_BOOTROM instead of returning to BootROM directly, so that U-Boot's SPL framework is used for returning to BootROM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31arm: mvebu: Implement return_to_bootrom() via U-Boot's SPL frameworkPali Rohár2-0/+16
U-Boot's SPL framework already has an API for loading U-Boot via BootROM. Implement the function board_return_to_bootrom() for mvebu SPL code. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31arm: mvebu: Mark return_to_bootrom() as a noreturn functionPali Rohár1-1/+1
This function does not return, so add the appropriate compiler flag. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31arm: mvebu: Fix return_to_bootrom()Pali Rohár1-1/+2
Register r0 should be set to return value 0x0 - NO_ERR. Set r0 with return value after all registers are restored from the stack, so that the return value is always correct. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 944c7a317675 ("arm: mvebu: Add option to use UART xmodem protocol via kwboot") Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-29Merge branch '2021-07-28-assorted-fixes'Tom Rini3-11/+26
- Assorted bugfixes
2021-07-29Merge tag 'ti-v2021.10-rc2' of ↵WIP/29Jul2021Tom Rini20-276/+727
https://source.denx.de/u-boot/custodians/u-boot-ti - Add MMC High speed modes for AM64 and J7200 - Add Sierra/Torrent SERDES driver - Minor clean-ups for R5F boot from SPL
2021-07-28arm64: Update memcpy_{from, to}io() helpersPatrice Chotard2-10/+25
At early U-Boot stage, before relocation, MMU is not yet configured and disabled. DDR may not be configured with the correct memory attributes (can be configured in MT_DEVICE instead of MT_MEMORY). In this case, usage of memcpy_{from, to}io() may leads to synchronous abort in AARCH64 in case the normal memory address is not 64Bits aligned. To avoid such situation, forbid usage of normal memory cast to (u64 *) in case MMU is not enabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: mark.kettenis@xs4all.nl Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28arm: use the correct prototype for reset_cpu functionPatrick Delaunay1-1/+1
Align reset_cpu function with the next prototypes in sysreset.h or in cpu_func.h to solve compilation issue: void reset_cpu(void); This patch solves the prototype conflict when cpu_func.h is included. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass7-16/+16
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACYSimon Glass4-4/+4
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less than a year away. Also we want to have a CONFIG_I2C for U-Boot proper just like we have CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules. Rename this symbol so it is clear it is going away. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISCSimon Glass5-10/+10
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass11-16/+16
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOSTSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOGSimon Glass4-5/+5
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_MUSB_NEW_SUPPORT to SPL_MUSB_NEWSimon Glass2-2/+2
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_ETH_SUPPORT to SPL_ETHSimon Glass1-1/+1
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_POWER_SUPPORT to SPL_POWERSimon Glass3-6/+6
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-27Merge tag 'u-boot-amlogic-20210727' of ↵WIP/27Jul2021Tom Rini4-0/+90
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add SMBIOS info for Khadas VIM boards - Fix meson-axg-mipi PHY build - Fix VIM3 board phy-names property setup - Return correct value for non emmc boot sources on VIM3 - add kernel compression vars
2021-07-27ARM: dts: meson: Use devicetree for SMBIOS settings for Khadas VIM boardsArtem Lapkin4-0/+90
Khadas vim series: Use devicetree for SMBIOS settings Add settings and enable the default sysinfo driver so that these can come from the device tree. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Artem Lapkin <art@khadas.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27ARM: dts: stm32mp: Add OP-TEE reserved memory to SPL dtbAlexandru Gagniuc1-0/+3
Add the "/reserved-memory/optee" node to the SPL devicetree. The purpose is to allow configuring TZC regions when booting OP-TEE. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27stm32mp1: spl: Configure TrustZone controller for OP-TEEAlexandru Gagniuc1-0/+92
OP-TEE is very particular about how the TZC should be configured. When booting an OP-TEE payload, an incorrect TZC configuration will result in a panic. Most information can be derived from the SPL devicetree. The only information we don't have is the split between TZDRAM and shared memory. This has to be hardcoded. The rest of the configuration is fairly easy, and only requires 3 TZC regions. Configure them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-07-27arm: stm32mp: Implement support for TZC 400 controllerAlexandru Gagniuc3-0/+170
The purpose of this change is to allow configuring TrustZone (TZC) memory permissions. For example, OP-TEE expects TZC regions to be configured in a very particular way. The API presented here is intended to allow exactly that. UCLASS support is not implemented, because it would not be too useful. Changing TZC permissions needs to be done with care, so as not to cut off access to memory we are currently using. One place where we can use this is at the end of SPL, right before jumping to OP-TEE. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27ARM: dts: stm32: Fix AV96 eMMC pinmuxMarek Vasut2-2/+2
Commit 500327e2ea7 ("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.8-rc1") renamed sdmmc2_d47_pins_b phandle to sdmmc2_d47_pins_c, but without updating the AV96 DT which uses that phandle. Linux missed similar update as well and it was only added in commit 1ad6e36ec266 ("ARM: dts: stm32: Fix sdmmc2 pins on AV96") . Update the AV96 DT pinmux phandle, otherwise eMMC 8bit mode does not work and access to eMMC takes a very long time to fall back to 4bit mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-27stm32mp1: add pull-up for gpio button PA13 and PA14Patrick Delaunay2-4/+4
When a push-button is released and PA13/PA14 are defined as input (high-Z) the LED should not be active as the circuit is open but a small current leak through PCB or push-button close the circuit and allows a small LED bias giving erroneous level voltage. So it is recommended to activate an internal pull-up in order to clearly fix the voltage at PA13/PA14 when button is released and to wait a short delay before to read the GPIO value only when the pull-up is correctly configured. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-07-27arm: stm32mp1: force boot_device variable for invalid TAMP register valuePatrick Delaunay1-1/+3
When the TAMP register 20 have an invalid value (0x0 for example after TAMPER error) the "boot_device" U-Boot env variable have no value and no error is displayed in U-Boot log. The STM32MP boot command bootcmd_stm32mp failed with strange trace: "Boot over !" and the next command in bootcmd_stm32mp failed with few indication: if test ${boot_device} = serial || test ${boot_device} = usb; then stm32prog ${boot_device} ${boot_instance}; As it is difficult to investigate, the current patch avoids this issue: - change the debug message to error: "unexpected boot mode" is displayed - display trace "Boot over invalid!" in bootcmd_stm32mp - execute "run distro_bootcmd" to try all the possible target Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-07-27arm: dts: k3-j721e-r5: Remove MAIN R5FSS0 cluster from SPLSuman Anna2-16/+0
The MAIN R5FSS0 cluster and corresponding nodes are no longer required to be enabled in R5 SPL after removing the support for booting any core from this cluster on R5 SPL. So, remove these from the relevant dts files. This is essentially a revert of the additions done in commit 2984b82b3b76 ("arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL"). Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-5-s-anna@ti.com
2021-07-27arm: mach-k3: Cleanup common start_non_linux_remote_cores()Suman Anna2-6/+0
The mach-k3 common code defined a weak start_non_linux_remote_cores() function so that the proper implementation can be plugged in the SoC-specific source files. This won't be needed anymore, so remove the the common code. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-4-s-anna@ti.com
2021-07-27arm: mach-k3: j721e: Cleanup MAIN R5 boot code from R5 SPLSuman Anna1-40/+0
The common J7 specific start_non_linux_remote_cores() override function implements the logic to load and boot the Main R5FSS Core0 from R5 SPL. This won't be supported any more for either J721E or J7200 after the R5 SPL rearchitecture for the System Firmware split into TI Foundation Security (TIFS) and Device Management (DM) firmwares. So, cleanup the corresponding code and the related SPL env variables. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-3-s-anna@ti.com
2021-07-27arm: mach-k3: j721e: Move booting of Main R5FSS Core0 to A72 U-BootSuman Anna1-1/+5
The Main R5FSS Core0 on J721E SoCs is originally booted from R5 SPL itself to achieve certain product-level early-boot metrics. This is no longer supported after the R5 SPL re-architecture (support merged for v2021.10-rc1). Move the booting of this core altogether from R5 SPL to A72 U-Boot. The env variables are left as is for now, and will be cleaned up in a subsequent patch. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726211311.5977-2-s-anna@ti.com
2021-07-27arm: dts: k3-am65: Fix up MCU R5FSS cluster mode back to Split-modeSuman Anna1-0/+4
The default U-Boot environment variables and design are all set up to have the MCU R5FSS cluster to be in Split-mode. This is the setting in v2021.01 U-Boot and the dt nodes are synched with the kernel binding property names in commit 468ec2f3ef8f ("remoteproc: k3_r5: Sync to upstreamed kernel DT property names") merged in v2021.04-rc2. The mode for the cluster got switched back to LockStep mode by mistake in commit e49787634312 ("arm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-Boot") also in v2021.04-rc2. This throws the following warning messages when early-booting the cores using default env variables, k3_r5f_rproc r5f@41400000: Invalid op: Trying to start secondary core 2 in lockstep mode Load Remote Processor 1 with data@addr=0x82000000 65268 bytes: Failed! Fix this by switching back the cluster to the expected Split-mode. Make this mode change in the u-boot specific dtsi file to avoid such sync overrides in the future until the kernel dts is also switched to Split-mode by default. Fixes: e49787634312 ("arm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-Boot") Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726162213.28719-1-s-anna@ti.com
2021-07-27arch: dts: am642-sk-u-boot: Disable main_sdhci0 DT node and define alias ↵Aswath Govindraju1-0/+5
index 1 for main_sdhci1 node A Wilink wireless device is connected to MMCSD0 subsystem and is not supported in U-Boot. Therefore, disable main_sdhci0 device tree node in U-Boot. If main_sdhci0 device tree node is disabled then the the index of main_sdhci1 node becomes 0 which leads to break in boot flow. Therefore, add an alias to fix the index to 1. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726152807.22991-3-a-govindraju@ti.com
2021-07-27arch: arm: mach-k3: am642_init: Correct the function name spl_boot_mode() to ↵Aswath Govindraju1-1/+1
spl_mmc_boot_mode() Function spl_boot_mode() is called in common/spl/spl_mmc.c, to find the boot mode for a given boot device. This function was renamed to spl_mmc_boot_mode() by commit e97590654aea4c964f49bd915543a417d0c76996. Therefore, rename spl_boot_mode to spl_mmc_boot_mode. Fixes: 57dba04afbb7 ("arm: mach-k3: am642: Add support for boot device detection") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210726152807.22991-2-a-govindraju@ti.com
2021-07-27arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdesAswath Govindraju1-0/+12
Add u-boot tags for torrent serdes. This has properties specific to u-boot on top of DT in v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-15-kishon@ti.com
2021-07-27arm: dts: k3-j7200-common-proc-board: Enable SERDES DTAswath Govindraju1-0/+23
Add default lane function for torrent serdes. This is in sync with v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-14-kishon@ti.com
2021-07-27arm: dts: k3-j7200-main: Add DT node for torrent serdesAswath Govindraju1-0/+63
Add DT node for torrent serdes. This is in sync with v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-13-kishon@ti.com
2021-07-27ARM: dts: k3-j721e: Add support for USB3 in USB0 instanceKishon Vijay Abraham I1-1/+18
Configure the parent clock of wiz3_pll0_refclk to the internal clock required for USB3 to be functional and also remove "ti,usb2-only" property as it now supports USB3 mode. This has properties specific to u-boot on top of DT present in v5.13 of Linux Kernel. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-12-kishon@ti.com
2021-07-27arm: dts: Import am335x-sancloud-bbe devicetreePaul Barker2-0/+138
This device tree is imported from Linux 5.13.1 and enabled via the am335x board file and the am335x evm defconfig. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27arm: dts: Resync BeagleBone device treesPaul Barker6-215/+453
These device trees are updated to match the versions in Linux 5.13.1. The tick-timer entry in am335x-bone-common.dtsi is preserved. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-07-27arm: dts: k3-j7200-main: Add support for HS400 and update delay select ↵Aswath Govindraju1-1/+10
values for MMCSD subsystems HS400 speed mode is now supported in J7200 SoC[1]. Therefore add mmc-hs400-1_8v tag in sdhci0 device tree node. Also update the delay values for various speed modes supported, based on the revised january 2021 J7200 datasheet[2]. [1] - section 12.3.6.1.1 MMCSD Features, in https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf, (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021) [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf, (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021) Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210525093826.10390-3-a-govindraju@ti.com
2021-07-26arm64: zynqmp: Move USB3 PHY properties from DWC3 node to USB nodeManish Narani13-30/+30
Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This PHY initialization should be handled from Xilinx USB core as the prerequisite register configurations are done here only. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26arm64: dts: zynqmp: Enable USB2.0 for zc1751-xm016-dc2Piyush Mehta1-2/+0
The board zynqmp-zc1751-xm016-dc2 support only USB2.0. This patch removes USB3.0 DT configuration for DC2 board. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-24Merge tag 'efi-2021-10-rc1-3' of ↵WIP/24Jul2021Tom Rini1-2/+11
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc1-3 Documentation: provide Makefile documentation SMBIOS: generate BIOS release date based on UEFI version improve error handling in SMBIOS table generation UEFI: correct handling of signed capsule if authentication if off
generated by cgit v1.1 at 2024-09-04 09:45:29 +0000