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2013-08-18Merge branch 'master' of git://88.191.163.10/u-boot-armTom Rini59-763/+2311
Fixup an easy conflict over adding the clk_get prototype and USB_OTG defines for am33xx having moved. Conflicts: arch/arm/include/asm/arch-am33xx/hardware.h Signed-off-by: Tom Rini <trini@ti.com>
2013-08-17Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD5-3/+61
2013-08-15Add TI816X supportTENART Antoine16-117/+1076
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15Prepare for TI816X : reuse existing code from TI814XTENART Antoine2-2/+2
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15arm, da850: enable the correct uart in arch_cpu_init()Heiko Schocher1-0/+4
in arch_cpu_init() uart2 is fix enabled, without reference the setting from CONFIG_SYS_NS16550_COM1. Use the setting from CONFIG_SYS_NS16550_COM1 for enabling the console. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
2013-08-15arm/davinci/da850: add uart0_pins_rtscts and RMII_MHz_50_CLK in ↵Heiko Schocher2-1/+8
emac_pins_rmii pinmux Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2013-08-15arm: spl: For Falcon Mode, set a default machid of ~0Tom Rini1-1/+6
With device trees, boards do not always set CONFIG_MACH_TYPE now, so we must not rely on this define being set. The kernel uses ~0 to see if we have a valid machine number or not, so set that as the default, invalid machine, id and only fix if CONFIG_MACH_TYPE is set. Acked-by: Dan Murphy <dmurphy@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15omap: emif: Set initial DDR PHY config firstTaras Kondratiuk1-1/+1
Commit "OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon" (f40107345cbcd6e0d1747eda45e76c4e2a6df0db) changed sequence to set final DDR PHY config register value at the beginning. Looks like it was made by mistake and should be reverted. Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-15ARM: omap24xx: remove remainders of dead boardMasahiro Yamada3-193/+0
Since Commit 7f5eef9 removed OMAP2420H4 support, arm1136/omap24xx has not been used at all. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-08-15ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx ↵Naumann Andreas4-1/+60
according to errata sprz318e. In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup. So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only. Also, the FSEL registers exist no longer, so removed them from init. Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel. Signed-off-by: Andreas Naumann <anaumann@ultratronik.de> [trini: Add extern to <asm/arch-omap3/clock.h> Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15ARM: AM43xx: Add build supportLokesh Vutla2-2/+3
Add AM43xx support in the required places Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: OMAP: Add CONFIG_OMAP_COMMONLokesh Vutla2-2/+2
Adding a new CONFIG_OMAP_COMMON which is included by all boards that needs to build cpu/armv7/omap-common folder. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: AM43xx: clocks: Add dpll and clock dataLokesh Vutla2-1/+116
Add dpll and clock data for AM43xx Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: AM43xx: Add header filesLokesh Vutla9-20/+378
Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: AM33xx: Move s_init to a common placeHeiko Schocher4-10/+72
s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15ARM: AM33xx: Cleanup clocks layerLokesh Vutla7-219/+174
Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15ARM: AM33xx: Cleanup dplls dataLokesh Vutla7-182/+227
Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2013-08-14powerpc/usb: Depricate usb_phy_type and usb_dr_mode uboot env variablesramneek mehresh1-22/+0
Remove getting values of usb mode and phy_type from "usb_dr_mode" and "usb_phy_type" uboot env variables. Now, these are determined only from hwconfig string Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-08-14fsl/usb: Move USB internal phy definitions to fsl_usb.hramneek mehresh2-51/+4
fsl_usb.h file created to share data bewteen usb platform code and usb ip driver. Internal phy structure definitions moved to this file Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-08-14powerpc/mpc85xx:Avoid hardcoded init for serdes block 1 & 2Prabhakar Kushwaha2-0/+20
It is not necessary for all processor to have serdes block 1 & 2. They may have only one serdes block. So, put serdes block 1 & 2 related code under defines Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-08-13Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini32-40/+396
2013-08-13Merge branch 'master' of git://www.denx.de/git/u-boot-mipsTom Rini4-150/+160
2013-08-13MIPS: bootm: drop obsolete Qemu specific bootm implementationDaniel Schwierzeck2-66/+0
The Qemu specific bootm implementation was intended for a special Qemu target in Linux kernel. But this target has been dropped in v2.6.25-rc1 by commit 302922e5f6901eb6f29c58539631f71b3d9746b8 Author: Ralf Baechle <ralf@linux-mips.org> Date: Tue Jan 29 10:15:02 2008 +0000 [MIPS] Qemu: Remove platform. The Qemu platform was originally implemented to have an easily supportable platform until Qemu reaches a state where it emulates a real world system. Since the latest release Qemu is capable of emulating the MIPSsim and Malta platforms, so this goal has been reached. The Qemu plaform is also rather underfeatured so less useful than a Malta emulation. Thus the special bootm implementation is obsolete by now and can be dropped. The Qemu support in U-Boot is going to be replaced by MIPS Malta board support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu MaltaDaniel Schwierzeck1-2/+20
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: add support for generic relocation of init ramdisksDaniel Schwierzeck2-2/+7
All linux kernels after v2.6 require a page-aligned location of an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to support this with the generic U-Boot relocation code. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: refactor initialisation of kernel environmentDaniel Schwierzeck1-33/+29
Move initialisation of Linux environment to separate functions. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: refactor initialisation of kernel cmdlineDaniel Schwierzeck1-47/+83
Move initialisation of Linux command line to separate functions. Also add support for bootm subcommand 'cmdline'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: add support for LMBDaniel Schwierzeck2-0/+23
This is required for init ramdisk relocation and device tree support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: optimize kernel entry callDaniel Schwierzeck1-7/+4
Fix signature of kernel entry function. Mark the kernel entry with __noreturn for better code optimisation. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-13MIPS: bootm: fix checkpatch.pl warningsDaniel Schwierzeck1-6/+7
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2013-08-12Merge branch 'master' of git://www.denx.de/git/u-boot-videoTom Rini5-115/+4
2013-08-12powerpc/mpc85xx: Cleanup license header in source filesYork Sun1-4/+1
Fix the license header introduced by the following patches Add TWR-P10xx board support Add T4240EMU target IDT8T49N222A configuration code Add C29x SoC support Add support for C29XPCIE board Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-12exynos: video: change mipi dsi write function parameters correctlyDonghwa Lee1-1/+1
This patch have changed mipi dsi write functions' parameters correctly so that type cast operations were removed. And mipi dsi payload is composed with array of panel commands to improve readability. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
2013-08-12video: Encapsulate font in video_font_data.hMarek Vasut1-1/+0
This patch moves all the font configuration values into video_font_data.h so they are all in the right place with the font. The video_font.h now only includes video_font_data.h and will allow us to select and include different font once more fonts are added. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> [agust: fixed build warning for mcc200] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-08-12Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2-0/+7
2013-08-10arm, am33xx: add clk_get prototypeHeiko Schocher1-0/+1
the clk_get() function is needed for the da8xx-fb video driver, which is used on the am3xx based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
2013-08-10video, da8xx: move da8xx-fb.h to drivers/videoHeiko Schocher1-113/+0
the da8xx-fb driver works also on am335x boards. So move the da8xx-fb.h file from arch/arm/include/asm/arch-davinci to drivers/video, so this driver can used from am335x based boards. Also add WVGA panel_type. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
2013-08-0983xx/pcie: fix build error for 83xx pcieRoy Zang1-0/+2
Fix the following build error caused by patch "powerpc/pcie: add PCIe version 3.x support": pcie.c:302:34: error: 'PCI_LTSSM' undeclared (first use in this function) pcie.c:303:15: error: 'PCI_LTSSM_L0' undeclared (first use in this function) Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09dma: apbh: Add special circular mode for LCDMarek Vasut1-0/+2
Add special function that executes a specially crafted circular DMA descriptor. The function doesn't wait for the descriptor to finish the transfer, since the descritor never finishes. This is useful when operating a SmartLCD through the LCDIF interface, as the LCDIF does not give us any means to have continuous refresh of the SmartLCD. Instead, the RUN bit in the LCDIF CTRL register must be triggered manually. This can be worked around by starting an DMA transfer which continuously sets the RUN bit. This function allows starting exactly such transfer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2013-08-09powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE]James Yang1-1/+1
The TIMING_CFG_3[EXT_ACTTOPRE] register field is 2 bits wide, but the mask omitted the LSB. This patch provides a 2-bit wide mask. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09powerpc/85xx: Add C29x SoC supportMingkai Hu7-0/+109
The Freescale C29x family is a high performance crypto co-processor. It combines a single e500v2 core with necessary SEC engine. There're three SoC types(C291, C292, C293) with the following features: - 512K L2 Cache/SRAM and 512 KB platform SRAM - DDR3/DDR3L 32bit DDR controller - One PCI express (x1, x2, x4) Gen 2.0 Controller - Trust Architecture 2.0 - SEC6.0 engine Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Po Liu <Po.Liu@freescale.com>
2013-08-09powerpc/pcie: remove PCIe version 3.x define for B4860 and B4420Zang Roy-R619111-1/+0
B4860 and B4420 has PCIe version 2.4 IP instead of 3.x Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2013-08-09powerpc/pcie: add PCIe version 3.x supportZang Roy-R619112-2/+34
T4240 PCIe IP is version 3.0 and has some update comparing previous QorIQ products. 1. Move Freescale specific register define to arch/powerpc/include/asm/fsl_pci.h and update the register offset define for T4240. 2. add the status/control register define use status/control register to judge the link status 3. The original code uses 'Programming Interface' field to judge if PCIE is EP or RC mode, however, T4240 does not support this functionality. According to PCIE specification, 'Header Type' offset 0x0e is used to indicate header type, so for PCIE controller, the patch changes code to use 'Header Type' field to identify if the PCIE is RC or EP mode. This patch fixes the PCIe card link up issue on T4240QDS. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09powerpc/rman: fix RMan support for t4240 and b4860Minghuan Lian2-8/+8
1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860. 2. Decrease RMan liodn offset number. SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3. For t4240 and b4860, RMan liodn base is assigned to 922, the original offset number is too large that the liodn (base+offset 922+678 = 1600) is greater than 0x500 the maximum liodn number. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09powerpc/asm: Move function declaration of 'serdes_get_prtcl' to fsl_serdes.hShaveta Leekha2-1/+1
It allows files not in the same path to use this function as required by B4 board file Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
2013-08-09powerpc/mpc85xx: Add defines for serdes RSTCTL registerShaveta Leekha1-1/+3
Also change the define name SRDS_RSTCTL_SDPD to SRDS_RSTCTL_SDEN, which stands for SerDes enable as mentioned in SerDes module guide Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
2013-08-09board/bsc9132qds: Configure DSP DDR controllerPriyanka Jain1-0/+6
BSC9132 SoC has two separate DDR controllers for PowerPC side and DSP side DDR. They are mapped to PowerPC and DSP CCSR space respectively. BSC9132QDS has two on-board MC34716EP DDR3 memory one connected to PowerPC and other to DSP side controller. Configure DSP DDR controller similar to PowerPC side DDR controller as memories are exactly similar. Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-08-09board/bsc9132qds: Add DSP side tlb and lawsPriyanka Jain2-1/+9
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a integrated device that contains two powerpc e500v2 cores and two DSP starcores. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 and M3 memory -Creating LAW for 1GB DDR which is connected exclusively to DSP-cores Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-08-09powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIELiu Gang1-1/+2
When a board (slave) boots from SRIO/PCIE, it would get the instructions from a remote board (master) by SRIO/PCIE interface, and the slave's u-boot image should be built with the SYS_TEXT_BASE=0xFFF80000; So the u-boot of the slave should avoid the NOR_BOOT branch at the booting stage. For example, when a P2041RDB boots from SRIO/PCIE, it will set TLB entry 15 from base address "CONFIG_SYS_MONITOR_BASE & 0xffc00000", and with the 4M size as the boot window in NOR_BOOT branch. Because the CONFIG_SYS_MONITOR_BASE = CONFIG_SYS_TEXT_BASE = 0xFFF80000, so the TLB entry will be from base address 0xffc00000 and with 4M size. Then the u-boot will set TLB entry 14 from base address "CONFIG_SYS_INIT_RAM_ADDR", and with the 16K size as the initial stack window. For the P2041RDB platform, the CONFIG_SYS_INIT_RAM_ADDR = 0xffd00000. So the TLB entry 14 and 15 will be in confliction. There will be right TLB entries configurations when avoid the NOR_BOOT branch and set the boot window from 0xfff00000 with 1M size space. Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
2013-08-09powerpc/mpc85xx: Workaround for A-005812York Sun4-0/+29
Erratum A-005812 Incorrect reservation clearing in Write Shadow mode can result in invalid atomic operations. For u-boot, this erratum only impacts SoCs running in write shadow mode. Signed-off-by: York Sun <yorksun@freescale.com>
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