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2018-09-27Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblazeTom Rini3-28/+33
Xilinx changes for v2018.11 - Handle BOARD_LATE_INIT via Kconfig SPL: - Enable GZIP for all partitions types(not only for kernel) ZynqMP: - Rearrange pmufw version handling - Support newer PMUFW with improved fpga load sequence Zynq: - Cleanup config file - Simplify zybo config by enabling option via Kconfig net: - Fix gems max-speed property reading - Enable support for fixed-link phys
2018-09-26Merge tag 'signed-efi-next' of git://github.com/agraf/u-bootTom Rini10-46/+192
Patch queue for efi - 2018-09-26 A lot of goodness in this release. We're *very* close to running the UEFI Shell and SCT natively. The only missing piece are HII protocols. - FAT write support (needed for SCT) - improved FAT directory support (needed for SCT) - RTC support with QEMU -M virt - Sandbox support (run UEFI binaries in Linux - yay) - Proper UTF-16 support - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell) - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell) - Fix window size determination - Fix Tegra by explicitly unmapping RAM - Clean up handle entanglement - Lots of generic code cleanup [trini: Fixup merge conflict in include/configs/qemu-arm.h] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-26fpga: zynqmp: Modify PL bitstream loading sequenceSiva Durga Prasad Paladugu1-0/+2
This patch modifies PL bitstream loading sequence as per latest Xilfpga which supports all variants of bitstream images generated from vivado and from bootgen. With this new change in Xilfpga, uboot doesn't need to validate and swap bitstream as it will be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting PMUFW version before skipping the validation and swap sequence as there can be old PMUFW which doesn't supports this feature. In this case, driver uses old way of PL bitstream loading sequence. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version()Siva Durga Prasad Paladugu2-15/+18
Modify the zynqmp_pmufw_version() routine to return PMUFW version so that it can be reused wherever required. Get PMUFW version from PMU only once at bootup and later just return stored value. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26arm64: zynqmp: Move PM version related macros to .hSiva Durga Prasad Paladugu2-11/+11
This patch moves the PM version related macros to .h file so that they can be reused in other files. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26arm64: zynqmp: Handle CONFIG_BOARD_LATE_INIT via KconfigMichal Simek1-2/+2
Disable BOARD_LATE_INIT via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-25config.mk: Remove duplicated -fno-strict-aliasingBin Meng3-3/+2
Now that we already disable the "strict-aliasing" globally, remove the duplicates in the nds32/riscv/x86 arch-specific Makefiles. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-25xtensa: use asm-generic/atomic.hChris Packham1-43/+1
Make use of asm-generic/atomic.h. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-25mips: use asm-generic/atomic.hChris Packham1-43/+1
Make use of asm-generic/atomic.h. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-09-25ARM: use asm-generic/atomic.hChris Packham1-146/+1
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-25mmc: omap_hsmmc: Fix pbias for omap3_logic to enable CD pinAdam Ford1-0/+1
The MMC card detect pin is connected to gpio127 on omap3_logic. When setting up the pbias register for MMC, let's also enable gpio_127 for the card detect. As part of the package deal, gpio_126 and gpio_129 are also enabled. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-25arm: spear: fix enabling of SSP2 clockQuentin Schulz1-1/+1
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Stefan Roese <sr@denx.de>
2018-09-25arm: spear: enable SSP1, 2 and 3 clocks when SPI controller driver is builtQuentin Schulz2-0/+5
SPI controllers SSP1, 2 and 3 require to enable their respective clocks. Let's enable them only when the SPI controller driver is built. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25ARM: dts: stm32mp1: Add EHCI support for stm32mp157c-ev1 boardPatrice Chotard1-0/+7
Add DT nodes to enable EHCI support Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-25ARM: dts: stm32mp1: Add usb gadget support for stm32mp157c-ev1 boardPatrice Chotard4-0/+55
Add DT nodes to enable DWC2 gadget support Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-23arm: qemu-arm: enable RTC (PL031) by defaultAKASHI Takahiro1-0/+2
Virtual machine provided by qemu-arm has a ARM PL031 Real Time Clock device. With this patch, the driver is enabled by default. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23sandbox: Allow to execute from RAMAlexander Graf1-1/+2
With efi_loader, we may want to execute payloads from RAM. By default, permissions on the RAM region don't allow us to execute from there though. So let's change the default allocation scheme for RAM to also allow execution from it. That way payloads that live in U-Boot RAM can be directly executed. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23sandbox: Fix setjmp/longjmpAlexander Graf3-34/+5
In sandbox, longjmp returns to itself in an endless loop because os_longjmp() calls into longjmp() which is provided by U-Boot which again calls os_longjmp(). Setjmp on the other hand must not return because otherwise the return freees up stack elements that we need during longjmp(). The only straight forward fix that doesn't involve nasty hacks I could find is to directly link against the system setjmp/longjmp implementations. That means we just provide the compiler with hints that the symbol will be available and actually fill them out with versions from libc. This approach should be reasonably platform agnostic Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23sandbox: Enhance map_to_sysmem() to handle foreign pointersSimon Glass3-9/+161
At present map_sysmem() maps an address into the sandbox RAM buffer, return a pointer, while map_to_sysmem() goes the other way. The mapping is currently just 1:1 since a case was not found where a more flexible mapping was needed. PCI does have a separate and more complex mapping, but uses its own mechanism. However this arrange cannot handle one important case, which is where a test declares a stack variable and passes a pointer to it into a U-Boot function which uses map_to_sysmem() to turn it into a address. Since the pointer is not inside emulated DRAM, this will fail. Add a mapping feature which can handle any such pointer, mapping it to a simple tag value which can be passed around in U-Boot as an address. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23sandbox: Add support for calling abort()Simon Glass1-0/+5
This function is useful to signal that the application needs to exit immediate. It can be caught with a debugger (e.g. gdb). Add a stub for it so that it can be called from within sandbox when an internal error occurs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23sandbox: Align RAM buffer to the machine page sizeSimon Glass1-3/+4
At present the sandbox RAM buffer is not aligned to any particular address boundary. This makes the internal pointers somewhat random with respect to the associated RAM buffer addresses. Align the buffer to the page size of the machine to help with this. Note that there is a header at the start of the allocated pointer. To avoid returning a pointer which is not aligned to a page boundary, we waste almost an entire page of memory for each allocation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23ARM: tegra: reserve unmapped RAM so EFI doesn't use itStephen Warren1-0/+14
Tegra U-Boot ensures that board_get_usable_ram_top() never returns a value over 4GB, since some peripherals can't access such addresses. However, on systems with more than 2GB of RAM, RAM bank 1 does describe this extra RAM, so that Linux (or whatever OS) can use it, subject to DMA limitations. Since board_get_usable_ram_top() points at the top of RAM bank 0, the memory locations describes by RAM bank 1 are not mapped by U-Boot's MMU configuration, and so cannot be used for anything. For some completely inexplicable reason, U-Boot's EFI support ignores the value returned by board_get_usable_ram_top(), and EFI memory allocation routines will return values above U-Boot's RAM top. This causes U-Boot to crash when it accesses that RAM, since it isn't mapped by the MMU. One use-case where this happens is TFTP download of a file on Jetson TX1 (p2371-2180). This change explicitly tells the EFI code that this extra RAM should not be used, thus avoiding the crash. A previous attempt to make EFI honor board_get_usable_ram_top() was rejected. So, this patch will need to be replicated for any board that implements board_get_usable_ram_top(). Fixes: aa909462d018 ("efi_loader: efi_allocate_pages is too restrictive") Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23efi_loader: simplify ifdefsStephen Warren3-4/+4
Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL too. This simplifies the conditional. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-09-23mips: mt7628a.dtsi: Add SPI clock-frequency propertyStefan Roese1-0/+2
This patch adds the clock-frequency property to the SPI controller DT node. It will be used by the SPI driver to calculate the baud rate. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: mt76xx: Add sysreset supportStefan Roese2-0/+8
This patch adds the necessary sysreset DT node and enables the required drivers via Kconfig. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: Add Gardena Smart-Gateway board supportStefan Roese2-0/+63
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage. This patch also includes 2 targets. One is the target that can be programmed into the SPI NOR flash and a 2nd target "xxx-ram" is added to support loading and booting via an already running U-Boot version. This allows easy development and testing without the need to flash the image each time. Signed-off-by: Stefan Roese <sr@denx.de> [fixed and regenerated defconfig files] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-23mips: Add LinkIt Smart 7688 supportStefan Roese2-0/+59
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM and 32 MiB of flash (SPI NOR). This patch also includes 2 targets. One is the target that can be programmed into the SPI NOR flash and a 2nd target "xxx-ram" is added to support loading and booting via an already running U-Boot version. This allows easy development and testing without the need to flash the image each time. Signed-off-by: Stefan Roese <sr@denx.de> [fixed and regenerated defconfig files] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22mips: Add basic MediaTek MT7620/88 supportStefan Roese9-0/+1004
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository: https://github.com/MediaTek-Labs/linkit-smart-uboot.git The mt7628a.dtsi file is imported from Linux v4.17. Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22mips: Add arch/mips/include/asm/atomic.hStefan Roese1-0/+54
This is needed for the UBIFS support. The file is a copy of arch/xtensa/include/asm/atomic.h Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODEDaniel Schwierzeck1-5/+1
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT (or CONF_CM_CACHABLE_COW when a CM is available). There is no need to make this configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: make index base address configurableDaniel Schwierzeck2-10/+20
The index base address used for the cache initialisation is currently hard-coded to CKSEG0. Make this value configurable if a MIPS system needs to have a different address (e.g. in SRAM or ScratchPad RAM). Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: optimise changing of k0 CCA modeDaniel Schwierzeck1-22/+32
Changing the Cache Coherency Algorithm (CCA) for kernel mode requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1 before changing the CCA mode. Jump back to KSEG0 afterwards. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: cache: reimplement dcache_[status, enable, disable]Daniel Schwierzeck2-46/+20
Those functions are not needed during cache init and can be implemented in C. Only support the safe disabling of caches when this is required for booting an OS. Reenabling caches is much harder to implement if an optional coherency manager must be supported. As there is no real use-case anyway, dcache_enable is implemented with an error message. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22MIPS: start.S: make boot config at offset 0x10 configurableDaniel Schwierzeck2-16/+28
Some MIPS systems store some board-specific boot configuration in the U-Boot binary at offset 0x10. This is used by Malta boards and by Lantiq/Intel SoC's when booting from parallel NOR flash. Convert the hard-coded values to Kconfig options to remove such board-specific stuff out of the generic start.S code. This also deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-09-22dt: bcm6838: add pinctrlPhilippe Reynes1-0/+12
Add pinctrl node and related syscon node for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-19Merge git://git.denx.de/u-boot-imxTom Rini2-1/+2
- changes in pico-* boards - fix imx6ull pinmux
2018-09-19Merge git://git.denx.de/u-boot-marvellTom Rini5-28/+44
- Multiples updates to the turris boards / platform - Changes / enhancements to the Marvell PHY drivers, mainly to support the turris platform - Many fixes and enhancements to the pxa3xx NAND driver - Fixes for the UART boot mode in kwboot - Misc minor changes to other 32bit and 64bit boards
2018-09-19board: turris_mox: Fixup U-Boot's device tree if PCIe connectedMarek Behún1-0/+7
If PCIe Mox module is connected we want to have PCIe node enabled in U-Boot's device tree. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19dts: mvebu: mcbin: drop redundant SD slot nodeBaruch Siach1-8/+0
Commit 61dccf73d302 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added a redundant DT node for SD card slot. Drop it. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arch/arm/dts: Update Turris Mox device treeMarek Behún1-7/+3
Remove smi_pins definition since it is already in armada-37xx.dtsi. Add assigned-clocks definitions to spi0. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19ARM: mach-mvebu: handle fall-back to UART bootChris Packham2-0/+12
The bootROM in the Armada-38x (and similar) SoC has two modes for UART boot. The first is when the normal boot media is blank (or otherwise missing the kwb header). The second is when the boot sequence has been interrupted with the magic byte sequence on the UART lines. In the first mode the bootROM routine and error code register will indicate that there was an error booting from the configured media in bits 7:0. In the second mode there is no error to indicate but the boot source is provided via bits 31:28. Handle both situations so that kwboot can be used for both boot strapping a blank board and for intercepting a regular boot sequence. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19Revert "arm: mvebu: fix boot from UART when in fallback mode"Chris Packham2-15/+0
This reverts commit e83e2b390038c9075642cb243a6292241beb8d73. This prevents kwboot from overriding the hardware strapped boot source. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19arm64: mvebu: armada-8k: support environment in SD/eMMCBaruch Siach1-0/+24
Detect the SD/eMMC boot device at run-time. Load the environment from the boot deice, as well as save to it. Leave the environment offset the same as in the SPI flash. Make SD/eMMC 0 the default environment device when the boot device is not detected. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-18Merge git://git.denx.de/u-boot-dmTom Rini16-5/+145
- MPC83xx device tree additions (CPU and RAM) - Fix sandbox build error - Sync bitrev with Linux - Various ofnode/DT improvements
2018-09-18Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic18-200/+525
Signed-off-by: Stefano Babic <sbabic@denx.de>
2018-09-18misc: Add MPC83xx serdes driverMario Six2-0/+8
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18cpu: Add MPC83xx CPU driverMario Six3-0/+6
Add a CPU driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18test: Add tests for CPU uclassMario Six1-0/+12
Add a sandbox CPU driver, and some tests for the CPU uclass. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18timer: Add MPC83xx timer driverMario Six3-3/+10
Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18clk: Add MPC83xx clock driverMario Six4-1/+83
Add a clock driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
generated by cgit v1.1 at 2024-07-15 00:53:20 +0000