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2015-12-07arm: socfpga: Remove cpu_mmc_init()Marek Vasut1-11/+0
This function triggers the registration of the dwmmc driver on SoCFPGA, but this is not needed in case the driver is correctly probed from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2015-12-07arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese3-1/+110
The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
2015-12-06am33xx: Update serial pdataTom Rini1-11/+7
We now want to make sure that we have the platform data for NS16550 when we do not have OF_CONTROL set. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-05dm: tegra: Provide serial platform data for SPLSimon Glass1-1/+1
At present an incorrect #if term is preventing this data from being compiled in. All tegra boards use driver model for serial, so we can just drop this. Fixes: fde7e18938d8 ("dm: tegra: pci: Move CONFIG_PCI_TEGRA to Kconfig") Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thomas Chou <thomas@wytron.com.tw>
2015-12-05rpi: get rid of BCM2835_BOARD_REV_* macrosStephen Warren1-28/+0
There are two numbering schemes for the RPi revision values; old and new scheme. The values within each scheme overlap. Hence, it doesn't make sense to have absolute/global names for the revision IDs. Get rid of the names and just use the raw revision/type values to set up the array of per-revision data. This change makes most sense when coupled with the next change. However, it's split out so that the mechanical cut/paste is separate from the logic changes for easier review and problem bisection. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-12-05Change e-mail address of Kamil LulkoKamil Lulko20-20/+20
Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com>
2015-12-05arch/arm/cpu/arm920t/ep93xx/led.c: Mark inline functions as static inlineTom Rini1-2/+2
With gcc-5.x we get warning about inline non-static functions referring to static elements. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-05arm: dts: dra7-evm: add chosen node to specify serial console deviceMugunthan V N1-0/+4
Introduce chosen node and specify uart0 to be used as serial console. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-05arm: dts: omap: add reg-shift to serial device tree nodeMugunthan V N3-0/+22
With the commit 'c7b9686d5d48 ("ns16550: unify serial_omap")' all TI platforms are broken with DM/DT boot as ns16550 driver expects reg-shift from DT which is not populated for TI platforms. Earlier it worked as it was hard coded to 2 in serial-omap driver. So adding the reg-shift to serial nodes for dra7, am4372 and am33xx dtsi files. Tested this patch on am437x-sk-evm, am437x-gp-evm, am335x-boneblack, dra74x-evm and dra72x-evm. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Thomas Chou <thomas@wytron.com.tw>
2015-12-05common: bootm: check return value of strict_strtoulPeng Fan1-1/+4
Before continue, check return value of strict_strtoul. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-04Merge branch 'master' of http://git.denx.de/u-boot-sparcTom Rini26-964/+551
2015-12-04Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini4-3/+18
2015-12-03sparc: Remove non-generic board init files: board.c, time.cFrancois Retief9-662/+7
Remove the board.c and time.c files and all associated non-generic board initialization code. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Added busy wait function, made wait_ms() work when IRQ is disabledDaniel Hellstrom1-2/+30
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: leon3: Added CPU count and frequency detection.Daniel Hellstrom2-1/+58
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: Removed USB stop from linux bootm, arch-independent bootm stop USBDaniel Hellstrom1-8/+0
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: Add CONFIG_DISPLAY_BOARDINFO variable to all LEON boardsFrancois Retief2-0/+20
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Update PROM initialization code for generic boardFrancois Retief4-28/+32
Fixed the prom_relocate() function in start.S file by reserving memory in the board_init_f sequence and saving the offset to the __prom_start_reloc variable. This value is used as the destination when relocating the PROM. Add the prom_init() function to the end of the board_init_r sequence. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Update cpu_init.c to use generic timer infrastructureFrancois Retief5-74/+104
Introduce the CONFIG_SYS_TIMER_* macros in include/asm/config.h to make use of the generic timer infrastructure in lib/time.c. Created a timer_init() function to initialize the timer hardware and update the #ifdef in board_init_f to allow this function to be called during the start-up sequence. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon2: Updates for generic board initializationFrancois Retief2-75/+107
Reworked the LEON2 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON2 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Updates for generic board initializationFrancois Retief2-116/+143
Reworked the LEON3 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON3 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Clear all unused GPTIMER registers.Daniel Hellstrom1-1/+9
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: leon3: Move ambapp_bus_init() call to arch_cpu_init() functionFrancois Retief2-5/+6
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Move snoop detection from startup.S to arch_cpu_init()Francois Retief4-21/+21
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Initial ground work for generic board initializationFrancois Retief8-25/+41
Initial ground work in preperation for generic board initialization code for the SPARC architecture. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Fix whitespace in cpu/leon2/cpu_init.cFrancois Retief1-5/+5
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Updated serial driver to use CONFIG_CONS_INDEXFrancois Retief1-0/+5
Updated the LEON3 serial driver to make use of the CONFIG_CONS_INDEX option to select which serial port the console will use. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Serial baud rate register support multiple buses with different frequencyDaniel Hellstrom3-4/+16
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: leon3: Clear GD_FLAG_SERIAL_READY flag on AMBA failureFrancois Retief1-0/+1
Clear the GD_FLG_SERIAL_READY flag on AMBA P&P lookup failure so that the panic function can use DEBUG_UART driver. drivers/serial/serial.c set this flag before calling this function, preventing DEBUG_UART code from running. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Added function that checks if IRQ is on or offDaniel Hellstrom2-0/+10
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2015-12-03sparc: Remove version_string variable from start.S fileFrancois Retief2-21/+6
Remove the version_string variable from start.S file. A weak variable is also set in the cmd_version.c file. No need for architecture override. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Move SYS_SPARC_NWINDOWS to KconfigFrancois Retief2-0/+14
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-01Revert "rockchip: Reconfigure the malloc based to point to system memory"Sjoerd Simons1-7/+0
This patch was merged shortly before the v2015.10 as a minimal fix for booting on rockchip. Now that the patch series from Hans to do the relocation in generic code has been merged it can be dropped. This reverts commit b1f492ca9e0c090209824ff36456d4f131843190. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: move SYS_MALLOC_SIMPLE to mach-rockchip KconfigAriel D'Alessandro1-0/+3
Commit 1eb0c03c2198a7ec9de456b83dacdc4831b96cbf added SPL_SYS_MALLOC_SIMPLE Kconfig option and changed the way it is evaluated. Thus, the definitions of CONFIG_SYS_MALLOC_SIMPLE in rk3***_common.h board configs are now incorrect because CONFIG_SPL_BUILD is enabled so CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) will look for SPL_SYS_MALLOC_SIMPLE instead of SYS_MALLOC_SIMPLE. This commit fix this enabling SPL_SYS_MALLOC_SIMPLE with the new Kconfig option by default in rockchip-mach. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Add max spl size & spl header configsJeffy Chen3-0/+27
Our chips may have different max spl size and spl header, so we need to add configs for that. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h, Added $(if...) to tools/Makefile to fix widespread build breakage Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h, - Add $(if...) to tools/Makefile to fix widespread build breakage
2015-12-01rockchip: Add basic support for evb-rk3036 boardhuang lin3-1/+62
This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
2015-12-01rockchip: rk3036: Add core Soc start-up codehuang lin7-2/+104
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
2015-12-01rockchip: add rk3036 sdram driverhuang lin3-0/+1107
add rk3036 sdram driver so we can set up sdram in SPL Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: add early uart driverhuang lin3-0/+108
add early uart driver so we can print debug message in SPL stage Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: mmc: get the fifo mode and fifo depth property from dtshuang lin1-0/+1
rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver. Signed-off-by: Lin Huang <hl@rock-chips.com>
2015-12-01rockchip: rk3036: Add a simple syscon driverhuang lin2-1/+22
Add a driver that provides access to system controllers Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: rk3036: Add Soc reset driverhuang lin2-0/+55
We can reset the Soc using some CRU (clock/reset unit) register. Add support for this. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: rk3036: Add header files for GRFhuang lin1-0/+493
GRF is the gereral register file. Add header files with register definitions. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: rk3036: Add clock driverhuang lin1-0/+168
Add a driver for setting up and modifying the various PLLs, peripheral clocks and mmc clocks on RK3036 Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Bring in RK3036 device tree file includes and bindingshuang lin1-0/+427
Since rk3036 device tree file still in reviewing, bring it from https://patchwork.kernel.org/patch/7203371/ and add some aliases we need in uboot Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: add config decide whether to build common.chuang lin1-1/+1
some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: rename board-spl.c to rk3288-board-spl.chuang lin2-1/+1
since different rockchip soc need different spl file, so rename board-spl.c. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: move SYS_MALLOC_F_LEN to rk3288 own Kconfighuang lin2-3/+3
since different rockchip SOC have different size of SRAM, So the size SYS_MALLOC_F_LEN may different, so move this config to rk3288 own Kconfig Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: add timer driverhuang lin4-19/+73
some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01ARM: mxs: fix VDDD brownout settingMichael Heimpold1-2/+2
At the moment, the desired brownout is at 1.0V. However, this setting cannot be realized by hardware since we have only 3 bits to represent the voltage difference from the target value. Target value is 1500 mV, brownout target is 1000 mV, voltage steps are 25 mV. Register content calculation: (1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14 Register takes only 3 bits, that is 0x4. But 0x4 * 25 [mV] = 100 [mV], that means that actual brownout level is 1500 [mV] - 100 [mV] = 1.4 V. Minimum possible BO level is 1500 [mV] - 0x7 * 25 [mV] = 1315 [mV]. So lets use this value as desired BO value (which is also the same as FSL bootlets use). Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
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