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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
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A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.
The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
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When the Allwinner BROM loads the SPL from an eMMC boot partition, it
sets the boot source byte to the same value as when booting from the
user data partition. This prevents us from determining the boot source
to load U-Boot proper from the proper partition for sure.
The generic SPL MMC code already looks at the enabled boot partition
number, to load U-Boot proper from the same partition, but this fails
if there is nothing bootable in this partition, as the BROM then
silently falls back to the user data partition, which the SPL misses.
To learn about the actual boot source anyway, we repeat the algorithm
the BROM used to select the boot partition in the first place:
- Test EXT_CSD[179] to check if an eMMC boot partition is enabled.
- Test EXT_CSD[177] to check for valid MMC interface settings.
- Check if BOOT_ACK is enabled.
- Check the beginning of the first sector for a valid eGON signature.
- Load the whole SPL.
- Recalculate the checksum to verify the SPL is valid.
If one of those steps fails, we bail out and continue loading from the
user data partition. Otherwise we load from the selected boot partition.
Since the boot source is needed twice in the boot process, we cache the
result of this test to avoid doing this costly test multiple times.
This allows the very same image file to be put onto an SD card, into the
eMMC user data partition or into the eMMC boot partition, and safely
loads the whole of U-Boot from there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Platforms can overwrite the weak definition of spl_mmc_boot_mode() to
determine where to load U-Boot proper from.
For most of them this is a trivial decision based on Kconfig variables,
but it might be desirable the probe the actual device to answer this
question.
Pass the pointer to the mmc struct to that function, so implementations
can make use of that.
Compile-tested for all users changed.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ley Foon Tan <ley.foon.tan@inte.com> (for SoCFPGA)
Acked-by: Lokesh Vutla <lokeshvutla@ti.com> (for OMAP and K3)
Reviewed-by: Simon Glass <sjg@chromium.org>
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BSP boot0 adjust PLL LDO regulator before clocks are initialized.
Let's do that.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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BSP boot0 executes resistor calibration before clocks are initialized.
Let's do that.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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H6 and H616 SPL code has a few writes to unknown PRCM registers. Now
that we know what they are, let's replace magic offsets with proper
register names.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This syncs the sun8i-h3-nanopi-neo.dts from the Linux tree, from tag
v5.18-rc1.
The alias is required to enable automatic MAC address generation.
Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build. Since the absolute load address is stored in the
TOC0 header, that information must be passed to mkimage.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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SPL uses the image header to detect the boot device and to find the
offset of the next U-Boot stage. Since this information is stored
differently in the eGON and TOC0 image headers, add code to find the
correct value based on the image type currently in use.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Create a do-nothing driver for each sunxi pin controller variant.
Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
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Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)
We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.
A future enhancement could try to determine semihosting capability by
inspecting the processor state. There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.
[1] https://tomverbeure.github.io/2021/12/30/Semihosting-on-RISCV.html#avoiding-hangs-when-a-debugger-is-not-connected
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.
Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.
This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).
These steps require LS1046A support in OpenOCD, which was added in [1].
[1] https://sourceforge.net/p/openocd/code/ci/5b70c1f679755677c925b4e6dd2c3d8be4715717/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
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This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.
To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.
I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:
- Implementing DDR initialization through JTAG (typically with dozens of
lines of TCL) and then loading U-Boot. The DDR initialization
typically uses hard-coded register writes, and is not easily adapted
to different boards. BOOT_DEVICE_SMH allows booting with SPL,
leveraging U-Boot's existing DDR initialization code. This is the
method used by NXP's CodeWarrior IDE on Layerscape processors (see
AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
then loading U-Boot. This is tricky, because the debugger must stop the
boot after the bootloader has completed its work. Trying to load
U-Boot too early can cause failure to boot. This is the method used by
Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
image to load U-Boot at the appropriate place. This can be a bit
tricky, because the load address is dependent on the header size. An
elf with symbols must also be used in order to stop at the appropriate
point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
where SPL automatically stops and tells the host where to place the
image.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This adds some documentation for semihosting functions in the header.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.
smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.
Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].
* Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
exising configuration.
* Implement inverted memory map in vexpress_aemv8.h
* Create vexpress_aemv8r defconfig
* Provide an MMU memory map for the BASER_FVP
* Update vexpress64 documentation
At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.
[1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add MAINTAINERS entry for Peter]
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So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.
Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
infrastructure. This is also slightly tweaked to fail graceful in case
the required files could not be found.
- Next we try to use a user provided script, that could be easily
placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
let's check virtio block devices next. This is where UEFI boot can
be easily used, for instance by providing a distro installer .iso
file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
PXE and DHCP boot flows, mostly because we can.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.
Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.
To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.
Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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The Arm Fixed Virtual Platform (FVP) is a software model for an
artificial ARM platform, it is available for free on the Arm website[1].
Add the devicetree files for the latest RevC version, as we will need
them to enable OF_CONTROL for the vexpress_aemv8a_semi board.
This is a verbatim copy of the respective files from Linux v5.17-rc6,
which is unchanged from the v5.16 release.
[1] https://developer.arm.com/tools-and-software/simulation-models/fast-models
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.
To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.
That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This converts the following to Kconfig:
CONFIG_SYS_MONITOR_BASE
Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_E300
CONFIG_E5500
Signed-off-by: Tom Rini <trini@konsulko.com>
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The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to
CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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This converts the following to Kconfig:
CONFIG_CLOCK_SYNTHESIZER
Signed-off-by: Tom Rini <trini@konsulko.com>
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We only set one of these values ever at this point, so remove dead code.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
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This converts the following to Kconfig:
CONFIG_MCFRTC
CONFIG_SYS_MCFRTC_BASE
While at it, remove '#undef RTC_DEBUG' from these config files.
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_MCFTMR
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CF_DSPI
Signed-off-by: Tom Rini <trini@konsulko.com>
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At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL. Remove
a bunch of now unused logic to simplify the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
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