aboutsummaryrefslogtreecommitdiff
path: root/arch/x86
AgeCommit message (Expand)AuthorFilesLines
2015-06-25Move default y configs out of arch/board KconfigJoe Hershberger1-15/+0
2015-06-04x86: gpio: add pinctrl support from the device treeGabriel Huau2-0/+24
2015-06-04x86: baytrail: pci region 3 is not always mapped to end of ramAndrew Bradford1-1/+1
2015-06-04x86: qemu: Implement PIRQ routingBin Meng4-0/+61
2015-06-04x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2-3/+10
2015-06-04x86: qemu: Create separate i440fx and q35 device treesBin Meng3-2/+37
2015-06-04x86: coreboot: Fix cosmetic issuesBin Meng2-25/+3
2015-06-04x86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSPBin Meng1-0/+1
2015-06-04x86: qemu: Adjust VGA initializationBin Meng2-19/+17
2015-06-04x86: qemu: Enable legacy IDE I/O ports decodeBin Meng3-0/+38
2015-06-04x86: qemu: Turn on legacy segments decodeBin Meng2-0/+26
2015-06-04x86: fsp_support: Correct high mem comment typoAndrew Bradford1-1/+1
2015-06-04x86: Do sanity test on pirq table before writingBin Meng1-0/+3
2015-06-04x86: quark: Implement PIRQ routingBin Meng4-15/+123
2015-06-04x86: Refactor PIRQ routing supportBin Meng8-300/+383
2015-06-04x86: qemu: Add graphics supportBin Meng1-1/+23
2015-06-04x86: Move FRAMEBUFFER_SET_VESA_MODE etc to video KconfigBin Meng1-141/+0
2015-06-04x86: Make QEMU the default vendorBin Meng1-1/+1
2015-06-04x86: Support QEMU x86 targetsBin Meng12-1/+259
2015-04-30x86: Enable multi-core init for Minnowboard MAXSimon Glass1-0/+20
2015-04-30x86: Add a CPU driver for baytrailSimon Glass5-6/+227
2015-04-30x86: Allow CPUs to be set up after relocationSimon Glass3-0/+54
2015-04-30x86: Add functions to set and clear bits on MSRsSimon Glass1-0/+28
2015-04-30x86: Add multi-processor initSimon Glass11-7/+934
2015-04-29x86: Provide access to the IDTSimon Glass2-0/+7
2015-04-29x86: Store the GDT pointer in global_dataSimon Glass2-0/+2
2015-04-29x86: Add an mfence macroSimon Glass1-0/+5
2015-04-29x86: Add defines for fixed MTRRsSimon Glass1-0/+14
2015-04-29x86: Add atomic operationsSimon Glass1-0/+115
2015-04-29x86: Add support for the Simple Firmware Interface (SFI)Simon Glass5-0/+311
2015-04-29x86: Disable -WerrorSimon Glass1-1/+1
2015-04-29x86: Remove unwanted MMC debuggingSimon Glass1-1/+0
2015-04-29x86: fsp: Use reset_cpu()Simon Glass1-7/+0
2015-04-29x86: quark: Use reset_cpu()Simon Glass1-1/+1
2015-04-29x86: ivybridge: Use reset_cpu()Simon Glass3-15/+6
2015-04-29x86: Implement reset_cpu() correctly for modern CPUsSimon Glass2-13/+28
2015-04-29x86: link: Add PCH driver to support SPI FlashSimon Glass2-1/+12
2015-04-29x86: minnowmax: use the correct NOR in the configurationGabriel Huau1-1/+1
2015-04-29x86: Correct the typo in write_tables()Bin Meng1-1/+1
2015-04-29x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/KconfigBin Meng1-6/+0
2015-04-29x86: Kconfig: MARK_GRAPHICS_MEM_WRCOMB cosmeticsBin Meng1-4/+4
2015-04-29x86: Kconfig: Move platform options forwardBin Meng1-10/+9
2015-04-29x86: Kconfig: Divide the target selection to vendor/modelBin Meng1-79/+13
2015-04-29x86: quark: Turn on legacy segments decodeBin Meng2-0/+19
2015-04-29x86: Check PIRQ routing table sanity in the F segmentBin Meng1-5/+13
2015-04-29x86: minnowmax: add GPIO banks in the device treeGabriel Huau1-0/+42
2015-04-29x86: baytrail: fix the GPIOBASE addressGabriel Huau1-1/+1
2015-04-29x86: queensbay: Implement PIRQ routingBin Meng7-4/+440
2015-04-29x86: Support platform PIRQ routingBin Meng4-0/+300
2015-04-29x86: Write configuration tables in last_stage_init()Bin Meng4-0/+90
generated by cgit v1.1 at 2024-08-14 04:21:15 +0000