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2014-12-15x86: move arch-specific asmlinkage to <asm/linkage.h>Masahiro Yamada5-1/+11
2014-12-13x86: Add a simple command to show FSP HOB informationBin Meng2-0/+68
2014-12-13x86: Support Intel FSP initialization path in start.SBin Meng3-0/+20
2014-12-13x86: Add post failure codes for bist and carBin Meng2-0/+3
2014-12-13x86: queensbay: Adapt FSP support codesBin Meng3-18/+28
2014-12-13x86: Initial import from Intel FSP release for Queensbay platformBin Meng12-0/+1522
2014-12-13x86: Add a simple superio driver for SMSC LPC47MBin Meng1-0/+90
2014-12-13x86: Add Intel Crown Bay board dts fileBin Meng2-1/+55
2014-12-13x86: ich6-gpio: Move setup_pch_gpios() to board support codesBin Meng3-0/+7
2014-12-13x86: Clean up asm-offsetsBin Meng2-2/+3
2014-12-13x86: Make ROM_SIZE configurable in KconfigBin Meng1-1/+77
2014-12-08Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada5-6/+7
2014-12-08Kbuild: introduce Makefile in arch/$ARCH/Daniel Schwierzeck1-0/+12
2014-11-25x86: dts: Add video information to the device treeSimon Glass1-0/+13
2014-11-25x86: Add initial video device init for Intel GMASimon Glass5-1/+927
2014-11-25x86: Add support for running option ROMs nativelySimon Glass5-0/+946
2014-11-25x86: Add vesa mode configuration optionsSimon Glass1-0/+149
2014-11-25x86: Add GDT descriptors for option ROMsSimon Glass2-22/+18
2014-11-25x86: ivybridge: Add northbridge init functionsSimon Glass5-1/+207
2014-11-25x86: Drop some msr functions that we don't supportSimon Glass1-11/+0
2014-11-25x86: Add init for model 206AX CPUSimon Glass5-0/+526
2014-11-25x86: Add LAPIC setup codeSimon Glass4-2/+181
2014-11-25x86: Drop old CONFIG_INTEL_CORE_ARCH codeSimon Glass1-28/+0
2014-11-25x86: Refactor interrupt_init()Bin Meng3-14/+23
2014-11-25x86: Remove cpu_init_r() for x86Bin Meng2-8/+0
2014-11-25x86: Call cpu_init_interrupts() from interrupt_init()Bin Meng2-2/+3
2014-11-25x86: Add Intel speedstep and turbo mode codeSimon Glass4-0/+219
2014-11-25x86: ivybridge: Set up XHCI USBSimon Glass3-0/+34
2014-11-25x86: ivybridge: Set up EHCI USBSimon Glass4-0/+33
2014-11-25x86: dts: Add SATA settings for linkSimon Glass1-0/+7
2014-11-25x86: ivybridge: Add SATA initSimon Glass5-0/+306
2014-11-25x86: dts: Add LPC settings for linkSimon Glass1-0/+8
2014-11-25x86: dts: Move PCI peripherals into a pci nodeSimon Glass1-13/+15
2014-11-25x86: ivybridge: Add additional LPC initSimon Glass2-1/+528
2014-11-25x86: ivybridge: Add PCH initSimon Glass3-0/+173
2014-11-25x86: Add a simple header file for ACPISimon Glass1-0/+24
2014-11-25x86: ivybridge: Add support for BD82x6x PCHSimon Glass5-0/+167
2014-11-25x86: Set up edge triggering on interrupt 9Simon Glass2-0/+49
2014-11-25x86: pci: Add handlers before and after a PCI hose scanSimon Glass2-0/+15
2014-11-25x86: Add ioapic.h headerSimon Glass1-0/+38
2014-11-25x86: Factor out common values in the link scriptSimon Glass2-7/+12
2014-11-25x86: Ensure that all relocation data is included in the imageSimon Glass1-1/+3
2014-11-25x86: Panic if there is no relocation dataSimon Glass1-0/+3
2014-11-25x86: Remove board_early_init_r()Simon Glass1-11/+0
2014-11-25x86: Add ivybridge directory to MakefileSimon Glass1-0/+2
2014-11-24Merge git://git.denx.de/u-boot-x86Tom Rini57-175/+6391
2014-11-23x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2-7/+7
2014-11-23kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada1-0/+2
2014-11-23linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2-2/+2
2014-11-21x86: Rename chromebook-x86 to corebootSimon Glass1-1/+1
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