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2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass1-0/+8
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-11acpi: Move acpi_write_tables() to a generic headerSimon Glass1-2/+0
This function is used by both x86 and sandbox. Put it in a common header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09acpi: Move MCFG implementation to common libMoritz Fischer1-1/+0
MCFG tables are used on multiple arches. Move to common ACPI lib. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Use sizeof(*mcfg) instead of sizeof(*header) Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: acpi: Update acpi_fill_csrt() to use acpi_ctxSimon Glass1-1/+0
Update this function to the newer style, so we can avoid passing and returning an address through this function. Also move this function out of the x86 code so it can be used by other archs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25x86: Move FACP table into separate functionsSimon Glass1-2/+0
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25acpi: Move acpi_fill_header() to the generic headerSimon Glass1-1/+0
This function is not x86-specific so move it into the common header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25x86: Move the acpi table to generic global_dataSimon Glass1-1/+0
Allow this to be used on any arch. Also convert to using macros so that we can check the CONFIG option in C code. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt37-123/+123
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-01x86: Fix i8254 ifdef include guardAlistair Delva1-2/+2
When building U-Boot with clang, it notices that the i8254.h include guard does not work correctly due to a typo. Fix it. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the other same typo at the end of the same file] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: tangier: Replace Method() by Name() for _STA objectAndy Shevchenko1-64/+17
There is no point to use Method() for the constant. Replace it with Name() defined object. For the _STA case it saves 3 bytes per each entry. Before: 2881 After: 2833 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-21x86: Show some EFI info with the bdinfo commandSimon Glass1-0/+7
It is useful to see some basic EFI info with the command as it forms part of the information about a board. Add a hook for this and show the table address as a start. While here, fix an invalid cast in setup_efi_info(). Note that this function is using a data structure defined by Linux so we cannot change it. Also note that ulong is used since this is the standard in U-Boot (>6k uses), despite there being quite a bit of the more verbose uintptr_t (930 uses). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21x86: Create a new header for EFISimon Glass2-3/+32
The setup routines are called from zimage but don't really belong in the zimage header. Add a new EFI header to house these. Add comments so it is clear what the functions do. Note that these functions are x86-specific. The zimage business is not used on other architectures. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-27Merge tag 'v2021.10-rc5' into nextTom Rini1-0/+32
Prepare v2021.10-rc5
2021-09-22x86: tangier: acpi: Add GPIO card detection to SDHCI #2Andy Shevchenko1-0/+32
On Intel Tangier the SDHCI #2 provides SD card connection. Add GPIO card detection for it. Fixes: 39665beed6f7 ("x86: tangier: Enable ACPI support for Intel Tangier") BugLink: https://github.com/edison-fw/meta-intel-edison/issues/135 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-31Finish converting CONFIG_SYS_CACHELINE_SIZE to KconfigTom Rini1-6/+1
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-17efi_loader rename enum efi_mem_type to efi_memory_typeHeinrich Schuchardt1-1/+1
Use the same name as in the UEFI specification to avoid confusion. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-08-02x86: mtrr: Abort if requested size is not power of 2Bin Meng1-3/+4
The size parameter of mtrr_add_request() and mtrr_set_next_var() shall be power of 2, otherwise the logic creates a mask that does not meet the requirement of IA32_MTRR_PHYSMASK register. Programming such a mask value to IA32_MTRR_PHYSMASK generates #GP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass <sjg@chromium.org>
2021-07-15x86: Add function comments to cb_sysinfo.hSimon Glass1-0/+16
Add a function comment for get_coreboot_info() and a declaration for cb_get_sysinfo(), since this may be called from elsewhere. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15x86: Update the MP constants to avoid conflictsSimon Glass1-4/+8
These constants conflict with error codes returned by the MP implementation when something is wrong. In particular, mp_first_cpu() returns MP_SELECT_BSP when running without multiprocessing enabled. Since this is -2, it is interpreted as an error by callers, which expect a positive CPU number for the first CPU. Correct this by using a different range for the pre-defined CPU numbers, above zero and out of the range of possible CPU values. For now it is safe to assume there are no more than 64K CPUs. This fixes the 'mtrr' command when CONFIG_SMP is not enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-22lmb: move CONFIG_LMB in KconfigPatrick Delaunay1-1/+0
Migrate CONFIG_LMB in Kconfig. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-15x86: mtrr: Fix function descriptionsWolfgang Wallner1-2/+2
Fix copy/paste errors in the descriptions of mtrr_close () and mtrr_set(). Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-27x86: coral: Allow init of debug UART in U-Boot properSimon Glass1-0/+1
At present the debug UART is only set up in SPL, on the assumption that the boot flow will always pass through there. When booting from coreboot, SPL is not used, so the debug UART is not available. Move the code into a common place so that it can be used in U-Boot proper also. Add the required init to start_from_spl.S as well. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Allow installing an e820 when booting from corebootSimon Glass1-1/+15
Move this code into a generic location so that it can be used by other x86 boards which want to boot from coreboot. Also ensure that this is called if booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: coreboot: Update parsing of the latest sysinfoSimon Glass2-35/+290
Quite a few new tag types have been added over the years. Bring these into U-Boot so that all required tags can be parsed. Add a proper comment to struct sysinfo_t while we are here, since many of the meanings are not obvious. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: coreboot: Sync up timestamp codesSimon Glass1-1/+63
Add new timestamp codes that are present in coreboot, so that we can decode these in U-Boot. At present TS_U_BOOT_START_KERNEL is used twice. It should only be used just before jumping to Linux, so update the other call site to use TS_START_KERNEL. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Move coreboot timestamp info into coreboot_tables.hSimon Glass2-24/+39
This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27x86: Make coreboot sysinfo available to any x86 boardSimon Glass1-0/+0
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini1-0/+4
Prepare v2021.04-rc4
2021-03-09x86: Fix member check in intel_gnvsSimon Glass1-0/+4
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-03gpio: x86: Drop the deprecated methods in intel_gpioSimon Glass1-0/+5
We don't need to implement direction_input() and direction_output() anymore. Drop them and use update_flags() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass7-2/+14
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-01x86: zimage: Allow dumping the image from outside the moduleSimon Glass1-0/+10
At present it is possible to dump an image within the zimage command, but it is also useful to be able to dump it from elsewhere, for example in a loader that has special handling for the different zimage stages. Export this feature as a new function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01x86: Update Chromium OS GNVS namesSimon Glass1-6/+28
The Global Non-Volatile Storage struct has some fields with particular meanings. Rename these to make things easier to follow. Also add a few more boot flags. GNVS should not be confused with GNVQ (Going Nowhere Very Quickly). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-01-30x86: coral: Support TPM and RTC in SPLSimon Glass1-0/+3
Update the devicetree so that the TPM and RTC can be used in SPL. Also enable the pins used for getting the memory configuration settings while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05x86: apl: Adjust how the UART gets its platform dataSimon Glass1-1/+18
At present this driver calls malloc() to start a new platform data structure, fills it in and tells driver model to use it. We want to avoid malloc, particularly with the new version of of-platdata. Create a new struct which encompasses both the dtd struct and the ns16550 one, to avoid this. Unfortunately we must copy the data into the right place for the ns16550 driver. Add some comments about this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05x86: sysreset: Move priv/plat structs to headersSimon Glass1-0/+18
With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them and add the dtd struct too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05x86: Move priv/plat structs for intel_common to headersSimon Glass2-0/+39
With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05x86: apl: Move priv/plat structs to headersSimon Glass3-0/+62
With the new of-platdata, these need to be available to dt_platdata.c so must be in header files. Move them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05x86: Fix header guard in asm/pmu.hSimon Glass1-3/+3
This has the wrong name. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-31fsp: Move and rename fsp_types.h fileSughosh Ganu2-63/+2
The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-18x86: Drop unnecessary mp_init logicSimon Glass1-1/+1
Now that sequence numbers are set up when devices are bound, this code is not needed. Also, we should use dev_seq() instead of req_seq. Update the whole file accordingly. Also fix up APL cpu while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2-2/+2
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-4/+3
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-1/+1
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-06x86: Use CONFIG_CHROMEOS_VBOOT for verified bootSimon Glass1-3/+0
At present CONFIG_CHROMEOS is used to determine whether verified boot is in use. The code to implement that is not in U-Boot mainline. However, it is useful to be able to boot a Chromebook in developer mode in U-Boot mainline without needing the verified boot code. To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot should be used, and CONFIG_CHROMEOS to indicate that the board supports Chrome OS. That allows us to define CONFIG_CHROMEOS on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Define the Chrome OS GNVS regionSimon Glass1-1/+50
It is not possible to boot Chrome OS properly without passing some basic information from U-Boot. This applies even if verified boot is not being used. Add a structure definition for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Show the interrupt pointer with 'irqinfo'Simon Glass1-0/+17
It is useful for this command to show the address of the interrupt table. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Allow writing tables to failSimon Glass1-1/+3
At present write_tables() can fail but does not report this problem to its caller. Fix this by changing the return type. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Add a layout for Chrome OS verified bootSimon Glass1-0/+38
Add definitions for part of the vboot context used with verified boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: apl: Add core init for the SoCSimon Glass3-1/+42
Set up MSRs required for Apollo Lake. This enables Linux to use the timers correctly. Also write the fixed MSRs for this platform. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.1 at 2024-07-30 12:12:24 +0000