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path: root/arch/x86/dts/crownbay.dts
AgeCommit message (Expand)AuthorFilesLines
2016-05-23x86: dts: Update to include ACTL register detailsBin Meng1-0/+1
2016-02-05x86: ich6_gpio: Convert to use proper DM APIBin Meng1-14/+16
2016-02-05spi: ich: Use compatible strings to distinguish controller versionBin Meng1-1/+1
2016-01-28x86: Correct spi node aliasBin Meng1-2/+2
2016-01-24dm: x86: queensbay: Add an interrupt driverSimon Glass1-1/+1
2016-01-24dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass1-72/+78
2015-12-09x86: Fix PCI UART compatible string for crownbay and galileoBin Meng1-4/+4
2015-12-01x86: Convert to use driver model timerBin Meng1-0/+1
2015-11-19x86: crownbay: Convert to use driver model keyboardBin Meng1-0/+1
2015-08-26x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng1-5/+10
2015-08-26x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng1-1/+1
2015-07-28x86: Convert to use driver model pci on queensbay/crownbayBin Meng1-1/+5
2015-07-14x86: queensbay: Change PCIe root ports' interrupt routingBin Meng1-4/+16
2015-07-14x86: queensbay: Correct Topcliff device irqsBin Meng1-12/+12
2015-07-14x86: crownbay: Enable DM RTC supportBin Meng1-0/+1
2015-07-14x86: crownbay: Add MP initializationBin Meng1-0/+20
2015-06-04x86: Refactor PIRQ routing supportBin Meng1-0/+54
2015-04-29x86: Add alias for SPI node in the board dtsBin Meng1-1/+5
2015-01-13x86: crownbay: Add pci devices in the dts fileBin Meng1-0/+81
2015-01-12x86: Clean up the board dts filesBin Meng1-8/+3
2015-01-12x86: Rename coreboot.dsti to serial.dtsiBin Meng1-1/+1
2014-12-18x86: Convert microcode format to device-tree-onlySimon Glass1-0/+7
2014-12-13x86: Add Intel Crown Bay board dts fileBin Meng1-0/+53
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