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2023-09-24common: Drop linux/printk.h from common headerSimon Glass2-0/+2
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22x86: coreboot: Drop USB init on startupSimon Glass2-4/+1
This is very annoying as it is quite slow on many machines. Also, U-Boot has an existing 'preboot' mechanism to enable this feature if desired. Drop this code so that it is possible to choose whether to init USB or not. Use the existing USE_PREBOOT mechanism instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Set the CPU vendor in SPLSimon Glass1-0/+7
We don't read this information in 64-bit mode, since we don't have the macros for doing it. Set it to Intel by default. This allows the TSC timer to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Rearrange arch_cpu_init()Simon Glass1-3/+9
Init errors in SPL are currently ignored by this function. Change the code to init the CPU, reporting an error if something is wrong. After that, look for the coreboot table. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Avoid initing the CPU twiceSimon Glass1-5/+5
When TPL has already set up the CPU, don't do it again. This existing code actually has this backwards, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Add some log categoriesSimon Glass1-0/+2
Add some missing log categories to a few files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Show the memory delaySimon Glass1-1/+17
Samus only takes 7 seconds but it is long enough to think it has hung. Add a message about what it is doing, similar to the approach on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Prevent from missing the FADT chainingAndy Shevchenko4-20/+4
Recent approach with FADT writer shows that there is a room for subtle errors. Prevent this from happening again by introducing acpi_add_fadt() helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22Reland "x86: Move FACP table into separate functions""Simon Glass4-28/+70
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI)Troy Kisky1-1/+1
This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-31event: Use an event to replace last_stage_init()WIP/2023-08-31-replace-more-init-hooks-with-eventsSimon Glass4-6/+19
Add a new event which handles this function. Convert existing use of the function to use the new event instead. Make sure that EVENT is enabled by affected boards, by selecting it from the LAST_STAGE_INIT option. For x86, enable it by default since all boards need it. For controlcenterdc, inline the get_tpm() function and make sure the event is not built in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-31event: Convert existing spy records to simpleSimon Glass4-22/+16
Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-15common: return type board_get_usable_ram_topHeinrich Schuchardt9-9/+9
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-09x86: qemu: Add required linux/sizes.h includeSimon Glass2-0/+2
These files rely on the config.h file provided this include. Add it explictily so we can move to a text environment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09Revert "x86: Switch QEMU over to use the bochs driver"Simon Glass1-1/+1
Unfortunately the bochs driver does not currently work with distros. It causes a hang between grub menu selection and the OS displaying something. Preliminary investigation shows that GRUB does not jump to the kernel at all. This reproduces reliably. This reverts commit b8956425d525c3c25fd218f252f89a5e44df6a9f. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64 [Slightly modify the commit message about preliminary investigation] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09x86: Run QEMU machine setup in SPLSimon Glass1-1/+1
Call the hardware-init function from QEMU from SPL. This allows the video BIOS to operate correctly. Create an x86-wide qemu.h header to avoid having to #ifdef the header in spl.c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
2023-08-01x86: Return mtrr_add_request() to its old purposeSimon Glass1-1/+5
This function used to be for adding a list of requests to be actioned on relocation. Revert it back to this purpose, to avoid problems with boards which need control of their MTRRs (i.e. those which don't use FSP). The mtrr_set_next_var() function is available when the next free variable-MTRR must be set, so this can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Fixes: 3bcd6cf89ef ("x86: mtrr: Skip MSRs that were already programmed..") Fixes: 596bd0589ad ("x86: mtrr: Do not clear the unused ones..") Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Switch QEMU over to use the bochs driverSimon Glass1-1/+1
This is more convenient since it does not require a video BIOS. Enable it for QEMU. Also drop use of video in SPL for the 64-bit QEMU, since it not needed now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Convert some debug statements to use loggingSimon Glass2-6/+8
Move from using debug() to log_debug() so that we don't have to use the __func__ parameter and can access other logging features. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Improve the trampoline in 64-bit modeSimon Glass1-0/+19
At present this leaves the stack at the pre-relocation value. This is not ideal since we want to have U-Boot running entirely from the top of memory. In addition, the new global_data pointer is not actually used, since the global_data pointer itself is relocated, then the pre-relocation value is changed, so the effective value (after relocation) does not update. Adjust the implementation to follow the 32-bit code more closely, with a trampoline function which is passed the new stack and global_data pointer. This ensures that the correct values come through even when relocating. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Tidy up EFI code in interrupt_init()Simon Glass1-12/+5
The ll_boot_init() check handles the EFI case so we don't need the rest of the code. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17x86: Allow listing MTRRs in SPLSimon Glass1-0/+61
Move MTRR-listing code into a common file so it can be used from SPL. Update the 'mtrr' command to call it. Use this in SPL just before adjusting the MTRRs, so we can see the state set up by the board. Only show it when debug is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-06-12Merge tag v2023.07-rc4 into nextTom Rini9-43/+29
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-11x86: samus: Don't include audio and SATA in TPLSimon Glass1-2/+2
These are not used in TPL so disable the drivers to save space. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: Simplify cpu_jump_to_64bit_uboot()Simon Glass1-27/+5
This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when called from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: Support debug UART in 64-bit modeSimon Glass1-0/+7
The debug UART is already set up in SPL, so there is no need to do anything here. We must provide the (empty) function though. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: ivybridge: Ensure LPC is available for GPIO baseSimon Glass1-8/+9
The bd82x6x_get_gpio_base() does not work if the LPC is not set up. Probe it early to avoid this problem. In chromebook_link64 this problem shows up as an inability to read the GPIO straps for the memory type. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11dm: Emit the arch_cpu_init_dm() even only before relocationSimon Glass4-4/+4
The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11x86: Adjust search range for sysinfo tableSimon Glass1-2/+2
Avoid searching starting at 0 since this memory may not be available, e.g. if protection against NULL-pointer access is enabled. The table cannot be there anyway, since the first 1KB of memory was originally used for the interrupt table and coreboot avoids it. Start at 0x400 instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-10x86: cpu: qemu: qemu: remove SPL use with CONFIG_IS_ENABLEDTroy Kisky1-1/+1
CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT) would check for CONFIG_SPL_SPL_X86_32BIT_INIT for SPL builds Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-14dm: dts: Convert driver model tags to use new schemaSimon Glass1-2/+2
Now that Linux has accepted these tags, move the device tree files in U-Boot over to use them. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10Correct SPL uses of USB_KEYBOARDSimon Glass2-2/+2
This converts 2 usages of this option to the non-SPL form, since there is no SPL_USB_KEYBOARD defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18event: Correct dependencies on the EVENT frameworkTom Rini4-0/+4
The event framework is just that, a framework. Enabling it by itself does nothing, so we shouldn't ask the user about it. Reword (and correct typos) around this the option and help text. This also applies to DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be visible to the user to select, when EVENT is selected. With this, it's time to address the larger problems. When functionality uses events, typically via EVENT_SPY, the appropriate framework then must be select'd and NOT imply'd. As the functionality will cease to work (and so, platforms will fail to boot) this is non-optional and where select is appropriate. Audit the current users of EVENT_SPY to have a more fine-grained approach to select'ing the framework where used. Also ensure the current users of event_register and also select EVENT_DYNAMIC. Cc: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com> Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com> Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Fixes: 42fdcebf859f ("event: Convert misc_init_f() to use events") Fixes: c5ef2025579e ("dm: fix DM_EVENT dependencies") Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-12-23global: Migrate CONFIG_X86_REFCODE_RUN_ADDR to CFGTom Rini1-2/+2
Perform a simple rename of CONFIG_X86_REFCODE_RUN_ADDR to CFG_X86_REFCODE_RUN_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_X86_REFCODE_ADDR to CFGTom Rini1-1/+1
Perform a simple rename of CONFIG_X86_REFCODE_ADDR to CFG_X86_REFCODE_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_X86_MRC_ADDR to CFGTom Rini1-1/+1
Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-14x86: cosmetic: Fix a typo in the reserve_arch() commentsBin Meng1-1/+1
It should be fsp_continue(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass5-8/+8
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-29x86: fix longjmp() implementationHeinrich Schuchardt1-0/+5
If longjmp(jmp_buf env, int val) is called with val = 0, the setjmp() macro must return 1. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: treewide: Use uclass_first_device_err when accessing one deviceMichal Suchanek2-6/+2
There is a number of users that use uclass_first_device to access the first and (assumed) only device in uclass. Some check the return value of uclass_first_device and also that a device was returned which is exactly what uclass_first_device_err does. Some are not checking that a device was returned and can potentially crash if no device exists in the uclass. Finally there is one that returns NULL on error either way. Convert all of these to use uclass_first_device_err instead, the return value will be removed from uclass_first_device in a later patch. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23board_f: Fix types for board_get_usable_ram_top()Pali Rohár10-11/+11
Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-10common: Drop display_options.h from common headerSimon Glass1-0/+1
Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-06-23linker_lists: Rename sections to remove . prefixAndrew Scull3-9/+9
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-06serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE)Pali Rohár1-1/+1
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards to set different values for SPL, TPL and U-Boot Proper. For ns16550 driver this support is there since commit d293759d55cc ("serial: ns16550: Add support for SPL_DEBUG_UART_BASE"). Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-03pci: Add mask parameter to dm_pci_map_bar()Andrew Scull1-1/+1
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull1-1/+1
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-04Merge branch 'next'Tom Rini4-4/+12
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-31Revert "x86: Move FACP table into separate functions"Andy Shevchenko4-68/+28
Before the culprit patch (see BugLink for the details): => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 38 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 4c v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e5490 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 FACP 000e54f0 114 v06 U-BOOT U-BOOTBL 20220401 INTL 0 DSDT 000e4780 c06 v02 U-BOOT U-BOOTBL 10000 INTL 20200925 FACS 000e4740 40 MCFG 000e5610 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5650 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e56a0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 After the culprit patch: => acpi list Name Base Size Detail ---- -------- ----- ------ RSDP 000e4500 24 v02 U-BOOT RSDT 000e4530 34 v01 U-BOOT U-BOOTBL 20220401 INTL 0 XSDT 000e45e0 44 v01 U-BOOT U-BOOTBL 20220401 INTL 0 CSRT 000e53a0 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0 MCFG 000e5520 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0 SPCR 000e5560 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0 APIC 000e55b0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0 As a result Linux kernel can't find mandatory tables and fails to boot. Hence, revert it for good. This reverts commit 379d3c1fd6aa490b1ad5697525cfc89b615cf25a. BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/ Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass4-4/+12
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09acpi: Move MCFG implementation to common libMoritz Fischer2-10/+16
MCFG tables are used on multiple arches. Move to common ACPI lib. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Use sizeof(*mcfg) instead of sizeof(*header) Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-09-06 01:32:11 +0000