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2017-11-30x86: don't compare pointers to 0Heinrich Schuchardt1-2/+2
x86_vendor_name is defined as static const char *const x86_vendor_name[] So its elements should not be compared to 0. Remove superfluous paranthesis. Problem identified with Coccinelle. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-30x86: qemu: Move Cache-As-RAM memory from area mapped to ROMAnton Gerasimov1-1/+1
ROM has been made read-only in qemu recently (namely commit 208fa0e4: "pc: make 'pc.rom' readonly when machine has PCI enabled"). So this patch restores compatibility between U-Boot and qemu. Signed-off-by: Anton Gerasimov <anton@advancedtelematic.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: mention qemu commit title in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-10-27x86: braswell: cherryhill: Update dts for SPI lock downBin Meng1-4/+0
Intel Braswell FSP requires SPI controller settings to be locked down, let's do this in the chrryhill.dts and remove previous Kconfig option. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-27env: x86: braswell: Set ENV_IS_IN_SPI_FLASH as defaultBin Meng1-1/+0
Imply does not work for a Kconfig choice. Update ENV_IS_IN_SPI_FLASH to be the default one for Intel Braswell. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-27x86: braswell: Fix unexpected crash during Linux kernel bootBin Meng2-171/+1
It was observed that when booting Linux kernel on Intel Cherry Hill board, unexpected crash happens quite randomly. Sometimes kernel just oops, while sometimes kernel throws MCE errors and hangs: mce: [Hardware Error]: Machine check events logged mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: c400000000010151 mce: [Hardware Error]: TSC 0 ADDR 130f3f2c0 mce: [Hardware Error]: PROCESSOR 0:406c3 TIME 1508160686 SOCKET 0 APIC 0 microcode 363 This looks like a hardware error per mcelog. After debugging, it seems turning off turbo mode on the processor does not expose this behavior, although U-Boot runs OK with turbo mode on. Suspect it is related to an errata of Braswell processor. To fix this, remove the Braswell cpu driver which does the turbo mode configuration, and switch to use the generic cpu-x86 driver. Also there is a configuration option in the FSP that turns on the turbo mode and that has been turned off too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-19x86: baytrail: fsp: Move Azalia update codes to boardBin Meng1-109/+2
Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19x86: baytrail: fsp: Use a function to update the Azalia config pointerBin Meng1-2/+13
At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19x86: fsp: Consolidate Azalia header fileBin Meng1-7/+6
So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19x86: baytrail: Fix unstable ACPI S3 resumeBin Meng1-0/+22
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI S3 suspend/resume sometimes causes the Ubuntu kernel hang forever. The issue is however not reproduced with a kernel built from i386/ x86_64 defconfig configuration. The unstability is actually caused by unexpected interrupts being generated during the S3 resume. For some unknown reason, FSP (gold4) for BayTrail configures the GPIO DFX5 PAD to enable level interrupt (bit 24 and 25). As this pin keeps generating interrupts during an S3 resume, and there is no IRQ requester in the kernel to handle it, the kernel seems to hang and does not continue resuming. Clear the mysterious interrupt bits for this pin. Reported-by: Stefan Roese <sr@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-07x86: tangier: Enable ACPI support for Intel TangierAndy Shevchenko2-0/+88
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't utilize ACPI by default. Here is an attempt to unleash ACPI flexibility power on Intel Merrifield based platforms. The change brings minimum support of the devices that found on Intel Merrifield based end user device. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada1-3/+3
U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-16x86: ivybridge: remove unused variablesHeinrich Schuchardt1-10/+0
legacy_hole_base_k and legacy_hole_size_k are defined but not used. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-16x86: braswell: Disable PUNIT power configuration for B0 steppingBin Meng1-0/+6
FSP's built-in UPD configuration enables PUNIT power configuration, but on B0 stepping, this causes CPU hangs in fsp_init(). Disable it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: braswell: Add FSP configurationBin Meng2-1/+159
Add FSP related configuration for Braswell. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: Add Intel Braswell SoC supportBin Meng6-0/+335
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-02x86: baytrail: acpi: Add full reset bit to the reset register value in FADTBin Meng1-1/+1
It was noticed a few times, that the reboot from Linux (reboot command) is different from the reboot (reset command) under U-Boot. The U-Boot version does seem to reset the board more deeply (PCI cards etc) than the Linux reboot. This is actually caused by missing full reset bit in the reset register value in the ACPI FADT table. Reported-by: Stefan Roese <sr@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stefan Roese <sr@denx.de>
2017-08-24x86: tangier: kconfig: Guard tangier-specific optionsBin Meng1-0/+4
These options should not be exposed to other platforms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-08-24x86: baytrail: Fix turbo enableBin Meng1-0/+1
CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED must be turned on for Baytrail. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-24x86: Convert CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to KconfigBin Meng1-1/+1
This converts CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to a Kconfig option. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-15env: Convert CONFIG_ENV_IS_IN... to a choiceSimon Glass7-7/+0
At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-01Merge git://git.denx.de/u-boot-x86Tom Rini16-69/+118
2017-08-01x86: Switch all boards to use DM SCSIBin Meng6-0/+6
After MMC is converted to DM, convert to use DM SCSI as well for all x86 boards and imply BLK for both MMC and SCSI drivers. CONFIG_SCSI_DEV_LIST is no longer used. Clean them up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: Convert MMC to driver modelSimon Glass4-43/+1
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove DM_MMC from edison_defconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01x86: ivybridge: remove unused uma_memory_sizexypron.glpk@gmx.de1-5/+0
The value of uma_memory_size depends on an undefined value from the stack. The value of uma_memory_size is changed but never used. So simply remove this superfluous code. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: Convert INTEL_ICH6_GPIO to KconfigBin Meng4-0/+4
This converts Intel ICH6 GPIO driver to Kconfig, and add it to the imply list of platform drivers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Move USB to platform KconfigBin Meng8-0/+17
Like other peripheral drivers, move USB related drivers to platform Kconfig as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: qemu: kconfig: Imply platform specific driversBin Meng1-0/+4
Imply Qemu-specific drivers in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: quark: kconfig: Imply platform specific driversBin Meng1-0/+9
Imply Quark-specific drivers in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: tangier: kconfig: Imply platform specific driversBin Meng1-0/+7
Imply Tangier-specific drivers in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: queensbay: kconfig: Imply platform specific driversBin Meng1-0/+11
Imply drivers that work with Intel Queensbay platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: coreboot: kconfig: Imply drivers that are usefulBin Meng1-0/+10
U-Boot as coreboot payload can run on any x86 hardware ideally. Let's imply some common drivers that are useful. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: broadwell: kconfig: Imply platform specific driversBin Meng1-0/+6
Imply Broadwell-specific drivers in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: ivybridge: kconfig: Imply platform specific driversBin Meng1-0/+5
Imply drivers that are working with Ivybridge platform in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: baytrail: kconfig: Imply platform specific driversBin Meng1-1/+10
BayTrail integrates lots of peripherals that have U-Boot drivers. Imply those in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Imply ENABLE_MRC_CACHE in the platform KconfigBin Meng4-0/+4
Platform knows whether MRC cache is implemented, but using it can be a choice of a specific board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_EARLY_INIT_R in the platform KconfigBin Meng5-1/+20
This is architecture-dependent early initialization hence should be put in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_MISC_INIT in the platform KconfigBin Meng4-10/+2
arch_misc_init() is intended to do architecture-dependent stuff. This is required by each platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Let board select BOARD_EARLY_INIT_FBin Meng2-10/+0
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Imply HAVE_INTEL_ME in the platform KconfigBin Meng3-0/+3
Intel Management Engine is required by the platform, however it's not a must have when building a U-Boot image. For example, during development normally programming ME firmware is a one-time effort. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01ahci: Support non-PCI controllersSimon Glass1-1/+1
At present the AHCI SCSI driver only supports PCI with driver model. Rename the existing function to indicate this and add support for adding a non-PCI controller . Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-30x86: acpi: Deduplicate acpi_fill_madt() implementationAndy Shevchenko2-58/+0
In Baytrail and Quark support code acpi_fill_madt() is identical. Deduplicate its implementation by moving to lib/acpi_tables.c. At the same time mark acpi_fill_madt() with __weak attribute to keep a possibility to override it in platform code Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: Add Intel Edison board filesAndy Shevchenko1-0/+4
Add Intel Edison board which is using U-Boot. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Felipe Balbi <felipe.balbi@linux.intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> In case we're building for Intel Edison, we must have 4096 bytes of zeroes in the beginning on u-boot.bin. This is done in board/intel/edison/config.mk. First run sets hardware_id environment variable which is read from System Controller Unit (SCU). Serial number (serial# environment variable) is generated based on eMMC CID. MAC address on USB network interface is unique to the board but kept the same all over the time. Set mac address from U-Boot using following scheme: OUI = 02:00:86 next 3 bytes of MAC address set from eMMC serial number This allows to have a unique mac address across reboot and flashing. Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> [bmeng: Add MAINTAINERS file for Intel Edison board] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: Add Intel Tangier supportFelipe Balbi6-0/+281
Add Intel Tangier SoC support. Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-25Convert CONFIG_ENV_IS_IN_SPI_FLASH to KconfigSimon Glass1-0/+1
This converts the following to Kconfig: CONFIG_ENV_IS_IN_SPI_FLASH Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-11x86: Move link to use driver model for SCSISimon Glass1-1/+21
As a demonstration of how to use SCSI with driver model, move link over to use this. This patch needs more work, but illustrates the concept. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-06-27Revert "x86: Convert MMC to driver model"Bin Meng4-1/+43
This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555. With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops->read) in block_dread() function. The fix (SCSI driver converted to DM) is ready in u-boot-dm branch, but it is too late for this relese to get that in. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Fix boot hang with a debug buildBin Meng2-0/+9
It was observed that when -DDEBUG is used to generate a debug build, U-Boot does not boot on MinnowMax board. A workaround is to disable CONFIG_DEBUG_UART. The real issue is that in order to have the debug uart to work, BayTrail SoC needs to be configured so that its internal uart is available to be used as the debug uart. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integerBin Meng1-5/+6
At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Use macros instead of magic numbers for FSP settingsBin Meng1-15/+20
Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Remove "serial-debug-port-*" settingsBin Meng1-4/+0
"serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-09-17 01:02:38 +0000