rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-11-08	riscv: add #define in asm/io.h for some device drivers	Wei Fu	1	-0/+4
2021-11-08	riscv: function to retrieve SBI implementation version	Heinrich Schuchardt	1	-0/+1
2021-10-20	riscv: Avoid io read/write cause wrong result	Nick Hu	1	-9/+9
2021-10-07	sysreset: provide SBI based sysreset driver	Heinrich Schuchardt	1	-0/+1
2021-10-07	riscv: add missing SBI extension definitions	Heinrich Schuchardt	1	-2/+37
2021-09-07	riscv: lib: modify the indent	Zong Li	1	-1/+1
2021-09-07	board: sifive: use ccache driver instead of helper function	Zong Li	2	-28/+0
2021-07-06	board: sifive: Add an interface to get PCB revision	Zong Li	1	-0/+15
2021-05-31	riscv: cpu: fu740: Add support for cpu fu740	Green Wan	5	-0/+93
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng	1	-1/+1
2021-04-22	lmb: move CONFIG_LMB in Kconfig	Patrick Delaunay	1	-1/+0
2021-04-08	riscv: assembler versions of memcpy, memmove, memset	Heinrich Schuchardt	1	-21/+15
2021-02-03	riscv: Change phys_addr_t and phys_size_t to 64-bit	Bin Meng	1	-2/+2
2021-01-18	riscv: Add DMA 64-bit address support	Padmarao Begari	1	-0/+4
2020-12-13	dm: treewide: Rename ..._platdata variables to just ..._plat	Simon Glass	2	-2/+2
2020-09-30	riscv: Use a valid bit to ignore already-pending IPIs	Sean Anderson	1	-0/+7
2020-09-30	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	Sean Anderson	2	-5/+2
2020-09-14	riscv: define function set_gd()	Heinrich Schuchardt	1	-0/+9
2020-08-25	cmd: provide command sbi	Heinrich Schuchardt	1	-0/+2
2020-08-14	riscv: sifive/fu540: spl: Rename soc_spl_init()	Bin Meng	1	-1/+1
2020-08-14	riscv: Call spl_board_init_f() in the generic SPL board_init_f()	Bin Meng	1	-0/+7
2020-08-04	sifive: reset: add DM based reset driver for SiFive SoC's	Sagar Shrikant Kadam	1	-0/+13
2020-07-06	Merge branch 'next'	Tom Rini	4	-17/+87
2020-07-03	riscv: sifive: fu540: enable all cache ways from U-Boot proper	Pragnesh Patel	1	-0/+14
2020-07-01	riscv: Add option to support RISC-V privileged spec 1.9	Sean Anderson	1	-0/+40
2020-07-01	riscv: Clean up IPI initialization code	Sean Anderson	1	-0/+43
2020-07-01	riscv: Add headers for asm/global_data.h	Sean Anderson	1	-0/+2
2020-06-25	bdinfo: riscv: Use generic bd_info	Simon Glass	1	-17/+2
2020-06-04	riscv: sbi: Remove sbi_spec_version	Bin Meng	1	-2/+0
2020-06-04	riscv: sifive: fu540: add SPL configuration	Pragnesh Patel	1	-0/+14
2020-06-04	riscv: cpu: fu540: Add support for cpu fu540	Pragnesh Patel	2	-0/+52
2020-05-26	riscv: Move all SMP related SBI calls to SBI_v01	Atish Patra	1	-3/+2
2020-05-18	common: Drop linux/bitops.h from common header	Simon Glass	1	-0/+3
2020-04-23	riscv: Provide a mechanism to fix DT for reserved memory	Atish Patra	2	-0/+3
2020-04-23	riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL	Bin Meng	1	-1/+1
2020-03-17	riscv: Implement new SBI v0.2 extensions	Bin Meng	1	-0/+24
2020-03-17	riscv: Introduce a new config for SBI v0.1	Bin Meng	1	-0/+4
2020-03-17	riscv: Add SBI v0.2 extension definitions	Bin Meng	1	-0/+17
2020-03-17	riscv: Add basic support for SBI v0.2	Bin Meng	1	-79/+56
2020-03-17	riscv: Mark existing SBI as v0.1 SBI	Bin Meng	1	-19/+21
2020-03-17	riscv: Fix sbi_remote_sfence_vma{,_asid}	Bin Meng	1	-7/+12
2020-02-19	dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>	Masahiro Yamada	1	-26/+0
2020-02-19	dma-mapping: fix the prototype of dma_unmap_single()	Masahiro Yamada	1	-3/+1
2020-02-19	dma-mapping: fix the prototype of dma_map_single()	Masahiro Yamada	1	-2/+3
2020-01-25	asm: dma-mapping.h: Fix dma mapping functions	Vignesh Raghavendra	1	-2/+21
2019-12-10	riscv: add option to wait for ack from secondary harts in smp functions	Lukas Auer	1	-1/+2
2019-10-18	gpio: sifive: add support for DM based gpio driver for FU540-SoC	Sagar Shrikant Kadam	2	-0/+41
2019-08-26	riscv: add SPL support	Lukas Auer	1	-0/+31
2019-08-26	riscv: add run mode configuration for SPL	Lukas Auer	1	-1/+1
2019-08-15	riscv: Access CSRs using CSR numbers	Bin Meng	2	-236/+14