aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv/include
AgeCommit message (Expand)AuthorFilesLines
2021-05-31riscv: cpu: fu740: Add support for cpu fu740Green Wan5-0/+93
2021-05-17riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng1-1/+1
2021-04-22lmb: move CONFIG_LMB in KconfigPatrick Delaunay1-1/+0
2021-04-08riscv: assembler versions of memcpy, memmove, memsetHeinrich Schuchardt1-21/+15
2021-02-03riscv: Change phys_addr_t and phys_size_t to 64-bitBin Meng1-2/+2
2021-01-18riscv: Add DMA 64-bit address supportPadmarao Begari1-0/+4
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2-2/+2
2020-09-30riscv: Use a valid bit to ignore already-pending IPIsSean Anderson1-0/+7
2020-09-30riscv: Rework Andes PLMT as a UCLASS_TIMER driverSean Anderson2-5/+2
2020-09-14riscv: define function set_gd()Heinrich Schuchardt1-0/+9
2020-08-25cmd: provide command sbiHeinrich Schuchardt1-0/+2
2020-08-14riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng1-1/+1
2020-08-14riscv: Call spl_board_init_f() in the generic SPL board_init_f()Bin Meng1-0/+7
2020-08-04sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam1-0/+13
2020-07-06Merge branch 'next'Tom Rini4-17/+87
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel1-0/+14
2020-07-01riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson1-0/+40
2020-07-01riscv: Clean up IPI initialization codeSean Anderson1-0/+43
2020-07-01riscv: Add headers for asm/global_data.hSean Anderson1-0/+2
2020-06-25bdinfo: riscv: Use generic bd_infoSimon Glass1-17/+2
2020-06-04riscv: sbi: Remove sbi_spec_versionBin Meng1-2/+0
2020-06-04riscv: sifive: fu540: add SPL configurationPragnesh Patel1-0/+14
2020-06-04riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel2-0/+52
2020-05-26riscv: Move all SMP related SBI calls to SBI_v01Atish Patra1-3/+2
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass1-0/+3
2020-04-23riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra2-0/+3
2020-04-23riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng1-1/+1
2020-03-17riscv: Implement new SBI v0.2 extensionsBin Meng1-0/+24
2020-03-17riscv: Introduce a new config for SBI v0.1Bin Meng1-0/+4
2020-03-17riscv: Add SBI v0.2 extension definitionsBin Meng1-0/+17
2020-03-17riscv: Add basic support for SBI v0.2Bin Meng1-79/+56
2020-03-17riscv: Mark existing SBI as v0.1 SBIBin Meng1-19/+21
2020-03-17riscv: Fix sbi_remote_sfence_vma{,_asid}Bin Meng1-7/+12
2020-02-19dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>Masahiro Yamada1-26/+0
2020-02-19dma-mapping: fix the prototype of dma_unmap_single()Masahiro Yamada1-3/+1
2020-02-19dma-mapping: fix the prototype of dma_map_single()Masahiro Yamada1-2/+3
2020-01-25asm: dma-mapping.h: Fix dma mapping functionsVignesh Raghavendra1-2/+21
2019-12-10riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer1-1/+2
2019-10-18gpio: sifive: add support for DM based gpio driver for FU540-SoCSagar Shrikant Kadam2-0/+41
2019-08-26riscv: add SPL supportLukas Auer1-0/+31
2019-08-26riscv: add run mode configuration for SPLLukas Auer1-1/+1
2019-08-15riscv: Access CSRs using CSR numbersBin Meng2-236/+14
2019-08-15riscv: Sync csr.h with Linux kernel v5.2Bin Meng2-16/+114
2019-08-11env: Drop environment.h header file where not neededSimon Glass1-1/+0
2019-05-09riscv: Introduce CONFIG_XIP to support booting from flashRick Chen1-0/+2
2019-04-08riscv: Add a SYSCON driver for Andestech's PLMTRick Chen2-0/+4
2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen2-2/+4
2019-04-08riscv: add support for multi-hart systemsLukas Auer1-0/+1
2019-04-08riscv: import the supervisor binary interface header fileLukas Auer1-0/+94
2019-04-08riscv: add infrastructure for calling functions on other hartsLukas Auer2-0/+59