rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-05-09	riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...	Rick Chen	1	-0/+2
2019-05-09	riscv: Introduce CONFIG_XIP to support booting from flash	Rick Chen	1	-0/+6
2019-04-08	riscv: hang if relocation of secondary harts fails	Lukas Auer	1	-1/+12
2019-04-08	riscv: do not rely on hart ID passed by previous boot stage	Lukas Auer	1	-0/+4
2019-04-08	riscv: add support for multi-hart systems	Lukas Auer	1	-1/+133
2019-04-08	riscv: save hart ID in register tp instead of s0	Lukas Auer	1	-2/+2
2019-04-08	riscv: delay initialization of caches and debug UART	Lukas Auer	1	-8/+8
2018-12-18	riscv: Save boot hart id to the global data	Bin Meng	1	-0/+4
2018-12-18	riscv: Move trap handler codes to mtrap.S	Bin Meng	1	-89/+0
2018-12-05	riscv: ax25-ae350: Pass dtb address to u-boot with a1 register	Rick Chen	1	-2/+0
2018-12-05	riscv: Add kconfig option to run U-Boot in S-mode	Anup Patel	1	-8/+15
2018-11-26	riscv: cache: Implement i/dcache [status, enable, disable]	Rick Chen	1	-0/+6
2018-11-26	riscv: save hart ID and device tree passed by prior boot stage	Lukas Auer	1	-2/+10
2018-11-26	riscv: do not blindly modify the mstatus CSR	Lukas Auer	1	-4/+4
2018-11-26	riscv: remove unused labels in start.S	Lukas Auer	1	-9/+0
2018-11-26	Drop CONFIG_INIT_CRITICAL	Bin Meng	1	-13/+0
2018-11-26	riscv: align mtvec on a 4-byte boundary	Lukas Auer	1	-1/+1
2018-11-26	riscv: fix inconsistent use of spaces and tabs in start.S	Lukas Auer	1	-161/+161
2018-10-03	riscv: Make start.S available for all targets	Bin Meng	1	-0/+292