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AgeCommit message (Expand)AuthorFilesLines
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass3-3/+3
2017-04-05board_f: Drop return value from initdram()Simon Glass2-4/+10
2017-04-05board_f: Drop board_type parameter from initdram()Simon Glass2-2/+2
2017-01-10mips: Use common _AC macro now.Tom Rini1-3/+0
2016-12-02libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORYMasahiro Yamada1-2/+0
2016-11-30MIPS: Fix map_physmem for cached mappingsPaul Burton1-1/+1
2016-11-30MIPS: Use ram_top, not bi_memsize, in arch_lmb_reservePaul Burton1-1/+1
2016-11-30mips: Let cache.h be included from assembly sourceMarek Vasut1-0/+2
2016-11-30MIPS: add handling for generic and EJTAG exceptionsDaniel Schwierzeck5-0/+344
2016-11-30MIPS: reserve space for exception vectorsDaniel Schwierzeck2-0/+20
2016-11-30MIPS: add asm-offsets for struct pt_regsDaniel Schwierzeck2-0/+66
2016-11-30MIPS: add possibility to setup initial stack and global data in SRAMDaniel Schwierzeck2-0/+18
2016-11-30MIPS: factor out code for initial stack and global dataDaniel Schwierzeck1-26/+30
2016-11-30MIPS: fix iand optimize setup of CP0 registersDaniel Schwierzeck2-24/+51
2016-11-30MIPS: fix ROM exception vectorsDaniel Schwierzeck1-10/+19
2016-11-30MIPS: make inclusion of ROM exception vectors configurableDaniel Schwierzeck4-3/+32
2016-10-31Fix spelling of "resetting".Vagrant Cascadian1-1/+2
2016-10-19efi: Use asmlinkage for EFIAPISimon Glass1-0/+0
2016-09-23Remove arch/${ARCH}/include/asm/errno.hMasahiro Yamada1-1/+0
2016-09-23treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada1-1/+1
2016-09-21MIPS: Hang if run on a secondary CPUPaul Burton2-1/+27
2016-09-21MIPS: Fix cache maintenance in relocate_code & simplifyPaul Burton2-26/+21
2016-09-21boston: Introduce support for the MIPS Boston development boardPaul Burton3-0/+241
2016-09-21MIPS: Ensure cache ops complete in mips_cache_resetPaul Burton1-0/+2
2016-09-21MIPS: Clear hazard between TagLo writes & cache opsPaul Burton1-0/+1
2016-09-21MIPS: Ensure Config.K0=2 applies before any memory accessesPaul Burton1-0/+1
2016-09-21MIPS: Malta: Enable CM & L2 supportPaul Burton1-0/+2
2016-09-21MIPS: Join the coherent domain when a CM is presentPaul Burton2-0/+43
2016-09-21MIPS: L2 cache supportPaul Burton6-6/+291
2016-09-21MIPS: Map CM Global Control RegistersPaul Burton5-0/+88
2016-09-21MIPS: Define register names for cache initPaul Burton1-19/+23
2016-09-21MIPS: If we don't need DDR for cache init, init cache firstPaul Burton1-0/+9
2016-09-21MIPS: Preserve Config implementation-defined bitsPaul Burton2-2/+4
2016-09-21MIPS: Enable use of the instruction cache earlierPaul Burton2-8/+13
2016-09-21MIPS: Probe cache line sizes once during bootPaul Burton4-18/+45
2016-09-21MIPS: ath79: Use mach_cpu_init instead of arch_cpu_initPaul Burton1-1/+1
2016-09-21mips: Add MIPSfpga platform supportZubair Lutfullah Kakakhel1-0/+15
2016-09-21mips: xilfpga: Add device tree filesZubair Lutfullah Kakakhel3-0/+84
2016-08-15net: mii: Use spatch to update miiphy_registerJoe Hershberger1-8/+17
2016-07-31libfdt: Introduce new ARCH_FIXUP_FDT optionMichal Simek1-0/+2
2016-06-19clk: convert API to match reset/mailbox styleStephen Warren1-17/+28
2016-06-10MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hexPaul Burton1-1/+1
2016-06-10MIPS: Fix invalidate_dcache_range to operate on L1 DcachePaul Burton1-1/+1
2016-05-31mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro defineWills Wang2-1/+2
2016-05-31mips: ath79: Add support for ungating USB and ethernet on qca953xWills Wang1-0/+50
2016-05-31mips: ath79: ap121: Enable ethernetWills Wang2-2/+7
2016-05-31mips: ath79: Rename get_bootstrap into ath79_get_bootstrapWills Wang9-28/+15
2016-05-31MIPS: Abstract cache op loops with a macroPaul Burton1-41/+18
2016-05-31MIPS: Split I & D cache line size configPaul Burton4-20/+25
2016-05-31MIPS: Move cache sizes to KconfigPaul Burton3-4/+32
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