aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)AuthorFilesLines
2020-05-14board: stm32mp1: support boot from spi-nandPatrick Delaunay3-0/+9
Manage BOOT_FLASH_SPINAND, with boot_device="spi-nand" and treat this value in bootcmd_stm32mp. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: use FDT address provided by TF-A at boot timePatrick Delaunay2-0/+46
Save and use the FDT address provided by TF-A in r2 at boot time (it is NT_FW_CONFIG = Non Trusted Firmware configuration file) Address is saved in save_boot_params(), called by start.S and the used DTB is gd->fdt_blob = board_fdt_blob_setup(). If dtb is not provided or invalid, U-Boot use as fallback the builtin DTB. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14stm32mp1: dynamically detect op-tee presencePatrick Delaunay2-11/+3
Activate OP-TEE driver for trusted and optee defconfig. This driver allows detection of TEE presence for boot from flash; CONFIG_STM32MP1_OPTEE is also removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14board: stm32mp1: reserve memory for OP-TEE in device treePatrick Delaunay4-0/+51
Add reserve memory for OP-TEE in U-Boot and in kernel device tree: - no more reduce the DDR size in "memory" node: CONFIG_SYS_MEM_TOP_HIDE is no more used - U-Boot device-tree defines the needed "reserved-memory" for OP-TEE and U-Boot should not use this reserved memory: board_get_usable_ram_top use lmb lib to found the first free region, the not reserved memory, enough to relocate U-Boot: the needed size of U-Boot is estimated with gd->mon_len + CONFIG_SYS_MALLOC_LEN. - the optee node ("optee@...": firmware with compatible "linaro,optee-tz") and the associated "reserved-memory" are deactivated in kernel device tree when OP-TEE is not detected by U-Boot to prevent kernel issue (memory is reserved but not used, optee driver probe failed). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: stm32: Implement DDR3 coding on DHCOR SoMMarek Vasut2-0/+4
The DHCOR board does exist in multiple variants with different DDR3 DRAM sizes. To cater for all of them, implement DDR3 code handling. There are two GPIOs which code the DRAM size populated on the SoM, read them out and use the value to pick the correct DDR3 config. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: dts: stm32: Rework DDR DT inclusionMarek Vasut4-137/+248
Adjust the DDR configuration dtsi such that they only generate the DRAM configuration node, the DDR controller node is moved into the stm32mp157-u-boot.dtsi itself. This permits including multiple DDR configuration dtsi files in board DT. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14ARM: stm32: Implement board coding on AV96Marek Vasut3-0/+9
The AV96 board does exist in multiple variants. To cater for all of them, implement board code handling. There are two GPIOs which code the type of the board, read them out and use the value to pick the correct device tree from an fitImage. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: Iddb330b9a66500495885457cbe17edc0eacaaf43
2020-05-14ARM: stm32: Add board_early_init_f() to SPLMarek Vasut1-0/+11
Add weak implementation of board_early_init_f() hook into the STM32MP1 SPL. This can be used to read out e.g. configuration straps before initializing the DRAM. Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-12Merge tag 'u-boot-amlogic-20200511' of ↵Tom Rini1-0/+8
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - Enable USB Host for Odroid-C2 board - Add Open-Drain/Open-Source emulation in GPIO uclass
2020-05-11Merge tag 'ti-v2020.07-rc2' of ↵Tom Rini1-1/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix boot issues on Nokia RX-51 - Configure AM6 CPSW for 10Mbps in rgmii mode. - Minor changes for J721e
2020-05-11Merge tag 'u-boot-imx-20200511' of ↵Tom Rini31-196/+3118
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.07 ---------------- - i.MX NAND and nandbxb for i.MX8M - imx8MM : new beacon devkit - imx8MQ : new pico-imx8MQ - imx8QXP : extend to enable M4, fixes - add thermal support - caches in SPL (missing board) - Fixes Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
2020-05-11odroid-c2: enable USB host controllerBeniamino Galvani1-0/+8
Enable the second USB controller, which is connected to a hub with 4 ports. The first controller is for the OTG port and is currently not supported. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> [narmstrong: removed useless DWC2_UTMI_WIDTH in meson64.h] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-05-11arm: K3: Increase default SYSFW image size allocationAndrew F. Davis1-1/+1
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. Some additions to the board configuration data has pushed us slightly over the current defined size on some HS devices, expand to 278000. Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-05-11phy: Use _nodev naming convention if non-device clientsJagan Teki1-1/+2
Clients that are requesting some of uclass API's without a device (with ofnode) usually have _nodev naming convention. - clk_get_by_index_nodev - clk_get_by_name_nodev - reset_get_by_index_nodev - gpio_request_by_name_nodev So, update the same naming convention PHY framework. This doesn't change the existing functionality. Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-10imx8: cpu: check resource owned after sid failPeng Fan1-4/+4
When we create software partition, we still need let parent partition to configure sid, so move the check after sid failed. Acked-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/qxp: check whether m4 partition bootedPeng Fan2-0/+31
Add code to check m4 partition booted or not, we will use this to runtime set device tree file that passed to Linux Kernel. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8: Select boot device dynamicallyYe Li1-0/+12
For fspi build, we will enable both SPL NOR support and SPL SPI support. SPL will dynamically check the resource owner then select corresponding boot device. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/qxp: Recover SPL data section for partition rebootPeng Fan6-0/+54
When doing partition reboot, the boot image won't be reloaded by ROM, it is just CPU reset to boot entry. The SW has to keep the boot image inside the RAM unchanged. It includes both the TEXT section and DATA section. For SPL, the problem is DATA section will be updated at runtime, so in next partition reboot the data is not same as the initial value from cold boot. If any code depends on the initial value, then it will have problem. This patch introduces a mechanism to recover the data section for partition reboot. It adds a new section in image for saving data section. When from cold boot, the data section will be saved to that new section at SPL early phase. When from partition reboot, the data section will be restored from the new section. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-bootPeng Fan1-0/+1
Make sure that all devices that are powered up by SPL are powered down before entering into the u-boot. Otherwise the subsystem/device will never be powered down by SCFW, due to SPL and u-boot are in different partitions. Benefiting from power domain driver, this patch implements the function "imx8_power_off_pd_devices" to power off all active devices. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/qxp: add get_board_serialPeng Fan1-0/+32
Add get_board_serial support, the info could be got from fuse. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/qxp: Fix issue in get_effective_memsizeYe Li1-3/+3
When Trusty OS allocates the mem region from 0xfe0000000-0xffffffff, the get_effective_memsize does not return correct memory size. There is a check in get_effective_memsize to find the memreg where the u-boot is running, and return the size of that memreg as the result of get_effective_memsize. When using aligned start, the value is 0x80200000 since it is 2MB aligned. Thus the finding of memreg will fail and return the PHYS_SDRAM_1_SIZE because u-boot text base is 0x80020000. This cause u-boot is relocated to the high memory where has been occupied by Trusty OS. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: imx8qm/qxp: reserving DDR memory for M4Peng Fan2-0/+18
The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on QM and QXP. The M4 can allocate this memory by two ways, in SCD or u-boot. In this patch, u-boot addes the memory reserve node to DTB to pass the info to kernel, no matter the M4 memory is reserved in SCD or u-boot. So kernel won't access M4 reserved memory. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nandbcb: read boot search count from fuse for imx8qxpHan Xu1-1/+38
add support for imx8qxp to read boot search count from fuse in nandbcb Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10cmd: nandbcb: Reconstruct the nandbcb tool for all platformsHan Xu2-352/+955
The original nandbcb tool was designed for imx6 only, when trying to leverage it to replace the kobs-ng tool, we found the design is not friendly for supporting all platforms. To support all iMX6/7/8 platforms and for easy further maintain, I reconstruct the structure of the tool. The main changes including: 1. Use platform_data to determine the logic branches rather than simply use SOC name. 2. More data structures as parameter for functions. 3. Global variables to define the FCB/DBBT/FW locations. 4. Implement the kobs-ng default 4 FCB/4 DBBT/2 FW layout. 5. Support Hamming coding/ 40bit BCH/ 62bit BCH coding FCB. 6. Dump and compare all written FCB/DBBT to verify data integrity. The tool has been verified on iMX6Q/DL, 6SX, 7D, 6ULL, iMX8QX, iMX8MM. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nandbcb: add nandbcb dump command for i.MX6Alice Guo1-0/+4
Verify/dump boot structures. Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nandbcb: add nandbcb dump command for i.MX8MMAlice Guo1-8/+258
Verify/dump boot structures written to NAND Flash chip. Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nandbcb: support i.MX8MAlice Guo2-22/+68
Tested on i.MX8MM EVK, imx8mm evk uses BCH encoding and randomizer modify macro and print size_t with %zx use CONFIG_IMX8M because it should apply to imx8mq/mm/mn Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nandbcb: fix the issue cannot support gf_14 NAND bootHan Xu1-0/+1
bchtype in FCB should be associated to the gf_13/14 settings in BCH, fix the issue and test on Micron 29F64G08CBABB, it can boot after the change. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8: Replace SC_R_LAST with SC_R_NONE in DTBLeonard Crestez3-7/+6
We are currently using SC_R_LAST as a marker for imx8 power domain tree nodes without a resource attached. This value is compiled into dtb as part of the linux build and used by uboot. The SC_R_LAST constant changes frequently as SCFW resources are added (by design) and every time we need to update linux and uboot headers together or boot can fail. Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE defined to be 0xFFF0. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8: power: Add PD device lookup interface to power domain uclassPeng Fan1-0/+7
Add power_domain_lookup_name interface to power domain uclass to find a power domain device by its DTB node name, not using its associated client device. Through this interface, we can operate the power domain devices directly. This is needed for non-DM drivers. Modified from Ye's NXP downstream patch only for legacy imx8 power domain driver, since we have not migrated to use new power domain driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: Add support for i.MX8MM Beacon EmbeddedWorks devkit.Adam Ford6-0/+833
Beacon EmbeddedWorks, formerly known as Logic PD, is releasing a devkit based on the i.MX8M Mini SoC consisting of baseboard + SOM. It supports eMMC on the SOM, microSD on the baseboard, various GPIO, the PINCTRL, and UART. Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-10mtd: nand: support GPMI NAND driver for i.MX8Peng Fan3-14/+15
enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as i.MX8M - register definition for i.mx8 - DMA structure must be 32bit address Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mtd: mxs_nand: fix the gf_13/14 definition issueHan Xu1-4/+4
gf_13/14 mask was not set correctly in register definition. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10mxs_nand: Add support for i.MX8MYe Li3-6/+6
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10nand: mxs: correct bitflip for erased NAND pagePeng Fan1-1/+6
This patch is a porting of http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/ commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38 " i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. " In this patch, i.MX6UL is added and threshold changed to use ecc_strength. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: cpu: support tmuPeng Fan1-2/+2
Support tmu when print cpu info Signed-off-by: peng Fan <peng.fan@nxp.com>
2020-05-10imx: regs: add more fuse bank structurePeng Fan1-7/+34
Add more fuse bank structure for use. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mp: Set default SNSR25C for TMU probe1Ye Li1-0/+2
So far u-boot only load SNSR25C for TMU main probe (probe 0). However, kernel enables two probes. So it also needs to set default SNSR25C of TCALIV1 for blank samples. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: load calibration parameters from fuse for i.MX8MPYe Li1-0/+45
i.MX8MP thermal which has two probes and supports temperature range from -40 to 125. The driver still uses default 1p HW calibration at 25C and loads calibration parameters from fuse. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: i.MX8MN: Enable loading TASR and TCALIV from fuseYe Li1-1/+1
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers value from fuse before enabling TMU calibration. Otherwise the calibration is not exact. Reviewed-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx8mm: Load fuse for TMU TCALIV and TASRYe Li1-1/+27
On iMX8MM, the default value of TMU registers TCALIV and TASR need be loaded from fuse. HW won't do this, it expect SW loads them before using TMU. Reviewed-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10fec: Move imx_get_mac_from_fuse declare to imx fileYe Li1-0/+2
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp, we have two different ENET controllers and both need to call this function. So decouple its declare from fec driver. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10imx: add module fuse supportPeng Fan5-0/+458
There are different parts from one SoC. Take i.MX6ULL for example, some part might not have ENET, some might have; some might not have USB, some might have. The information could be got from OCOTP, to make one image support the different parts, we need runtime disable linux kernel dts node and uboot driver probe if the corresponding module not exists in the part. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQMarek Vasut3-1/+428
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier board. Currently working is ethernet, serial, eMMC. DT is imported from Linux 5.4.28 ("462afcd6e7ea") . Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-10Merge branch 'master' of git://git.denx.de/u-bootStefano Babic55-2455/+4614
2020-05-07cmd: cache: Fix non-cached memory cachabilityPatrice Chotard1-3/+10
If dcache is switched OFF to ON state and if non-cached memory is used, this non-cached memory must be re-declared as uncached to mmu each time dcache is set ON. Introduce noncached_set_region() to set this non-cached region's mmu settings. Let architecture override it by defining it as a weak function. For ARM architecture, noncached_set_region() defines all noncached region as non-cacheable. Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver, when going from dcache OFF to dcache ON state, ethernet driver issued TX timeout errors when performing dhcp or ping. It can be reproduced with the following sequence: dhcp while true ; do ping 192.168.1.300 ; dcache off ; ping 192.168.1.300 ; dcache on ; done Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Cc: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-07arm: juno: enable USBAndre Przywara1-0/+4
The Juno board features a standard compliant EHCI/OHCI USB host controller pair, which we can just enable. The platform data is taken from the device tree. This allows to use USB mass storage (the only storage on a Juno r0) for loading. At least on my board USB seems a bit flaky, I need two "usb reset" sequences after the "usb start" to detect an USB hard drive. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-07arm: juno: Use PSCI based resetAndre Przywara1-0/+2
So far the Juno board wasn't implementing reset. Let's just use the already existing PSCI_RESET based method to avoid any extra code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-07arm: juno: Enable OF_CONTROLAndre Przywara1-0/+5
The Arm Juno board was still somewhat stuck in "hardcoded land", even though there are stable DTs around, and one happens to actually be on the memory mapped NOR flash. Enable the configuration options to let the board use OF_CONTROL, and add a routine to find the address of the DTB partition in NOR flash, to use that for U-Boot's own purposes. This can also passed on via $fdtcontroladdr to any kernel or EFI application, removing the need to actually load a device tree. Since the existing "afs" command and its flash routines require flash_init() to be called before being usable, and this is done much later in the boot process, we introduce a stripped-down partition finder routine in vexpress64.c, to scan the NOR flash partitions for the DT partition. This location is then used for U-Boot to find and probe devices. The name of the partition can be configured, if needed, but defaults to "board.dtb", which is used by Linaro's firmware image provided. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-05Merge git://git.denx.de/u-boot-usbTom Rini2-0/+49
- MediaTek USB host support
generated by cgit v1.1 at 2024-07-19 15:15:37 +0000