aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)AuthorFilesLines
2023-05-03Merge tag 'u-boot-imx-20230503' of ↵Tom Rini9-35/+495
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230503 ------------------- - Fixes for : pico-imx6ul, smegw01 - new boards: DMSSE20, Reform 2 - fix: get_boot_device, PLL video rate CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
2023-05-03starqltechn: use button keyboard driverDzmitry Sankouski1-0/+18
Button keyboard driver used to navigate bootmenu entries. Add gpio buttons, button keyboard driver. Add gpio keys dts bindings. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-03arm: histb: hi3798mv200: add initial support for Hi3798MV200 HC2910-2AGHD05 ↵Yang Xiwen5-0/+351
board A board with Hi3798MV200 SoC and various peripherals. Details are in the board README.md. Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03arm: add support for Hisilicon HiSTB family SoCsYang Xiwen6-0/+93
First supported chip is hi3798mv200 (which is similar to Hi3798cv200 used by poplar). Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03arm: Remove omap5_uevm boardTom Rini8-5646/+0
This platform is unsupported by TI and was never widely distributed. As this is untested for a long while and missing some DM conversions, remove it and related device tree files. Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-03arm: mach-k3: Workaround errata ID i2331Nitin Yadav1-0/+33
Errata doc: https://www.ti.com/lit/pdf/sprz457 Errata ID i2331 CPSW: Device lockup when reading CPSW registers Details: A device lockup can occur during the second read of any CPSW subsystem register after any MAIN domain power on reset (POR). A MAIN domain POR occurs using the hardware MCU_PORz signal, or via software using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR. After these resets, the processor and internal bus structures may get into a state which is only recoverable with full device reset using MCU_PORz. Due to this errata, Ethernet boot should not be used on this device. Workaround(s): To avoid the lockup, a warm reset should be issued after a MAIN domain POR and before any access to the CPSW registers. The warm reset realigns internal clocks and prevents the lockup from happening. Workaround above errata by calling do_reset() in case of cold boot in order to trigger warm reset. This needs enabling SYSRESET driver in R5 SPL to enable TI SCI reset driver. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-05-03board: mediatek: add Bananapi-R3 devicetreeDaniel Golle3-0/+302
Add board specific devicetree for Bananapi R3 SBC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2023-05-03arm: mach-k3: am62a7: Enable QoS for DSSAradhya Bhatia5-0/+187
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is done by setting the DSS DMA orderID to 8. The C7x and VPAC have been overwhelming the DSS's access to the DDR (when it was accessing via the Non Real-Time (NRT) Queue), primarily because their functional frequencies, and hence DDR accesses, were significantly higher than that of DSS. This led the display to flicker when certain edgeAI models were being run. With the DSS traffic serviced from the RT queue, the flickering issue has been found to be mitigated. The am62a qos files are auto generated from the k3 resource partitioning tool. Section-3.1.12, "QoS Programming Guide", in the AM62A TRM[1], provides more information about the QoS, and section-14.1, "System Interconnect Registers", provides the register descriptions. [1] AM62A Tech Ref Manual: https://www.ti.com/lit/pdf/spruj16 Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
2023-05-03arm: mach-k3: j7200: Fix firewall warnings at boot timeManorit Chawdhry1-0/+6
J721E and J7200 have same file j721e_init.c which had the firewall configs for J721E being applied on J7200 causing the warnings. Split the firewalls for both the boards to remove those warnings. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-02arm: mach-k3: common: don't reconfigure background firewallsManorit Chawdhry2-1/+8
K3 devices have some firewalls set up by ROM that we usually remove so that the development is easy in HS devices. While removing the firewalls disabling a background region before disabling the foreground regions keeps the firewall in a state where all the transactions will be blacklisted until all the regions are disabled. This causes a race for some other entity trying to access that memory region before all the firewalls are disabled and causes an exception. Since the background regions configured by ROM are in such a manner that they allow all transactions, don't touch the background regions at all. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02arm: mach-k3: common: Default to non fitImage boot on HS-FSVignesh Raghavendra1-2/+2
Allow non fitImage bootflow on Field Securable (HS-FS) devices in addition to GP, force fitImage boot only on Security enforced (HS-SE) devices where signed images are necessary to maintain chain of trust. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02arm: dts: msm: add GENI SE QUP device tree nodeVladimir Zapolskiy3-12/+17
On modern Qualcomm platforms including SDM845 a GENI SE QUP IP description is supposed to be found in board device tree nodes, the version of the IP is used by the GENI UART driver to properly set an oversampling divider value, which impacts UART baudrate. The change touches dragonboard845c and starqltechn board device tree source files, a device tree node label to "debug" UART is renamed to 'uart9' according to the naming found in Linux. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02serial: msm-geni: Use upstream Linux bindingsKonrad Dybcio1-2/+2
The name "se" is used in upstream Linux device trees and has been for ages, long before this U-Boot-ism was introduced. Same goes for the existing compatible. Get rid of that. [vzapolskiy: removed a ready change in the driver] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02board: Add new Broadcom Northstar boardLinus Walleij3-0/+60
This adds a simple Northstar "BRCMNS" board to be used with the BCM4708x and BCM5301x chips. The main intention is to use this with the D-Link DIR-890L and DIR-885L routers for loading the kernel into RAM from NAND memory using the BCH-1 ECC and using the separately submitted SEAMA load command, so we are currently not adding support for things such as networking. The DTS file is a multiplatform NorthStar board, designed to be usable with several NorthStar designs by avoiding any particulars not related to the operation of U-Boot. If other board need other ECC for example, they need to create a separate DTS file and augment the code, but I don't know if any other users will turn up. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02arm: Add support for the Broadcom Northstar SoCsLinus Walleij1-1/+20
The original Northstar is an ARM SoC series that comprise BCM4709x and BCM5301x and uses a dual-core Cortex A9, the global timer and a few other things. This series should not be confused with North Star Plus (NSP) which is partly supported by U-Boot already. The SoC is well supported by the Linux kernel and OpenWrt as it is used in many routers. Since we currently don't need any chip-specific quirks and can get the system up from just the device tree, a mach-* directory doesn't even need to be added, just some small Kconfig fragments. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02arm: dts: Import device tree for Broadcom NorthstarLinus Walleij1-0/+581
This brings in the main SoC device tree used by the Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x. This is taken from the v6.3 Linux kernel. Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02arm: imx8m: remove unused and obsolete board_fix_fdt() in SOC contextHugo Villeneuve1-34/+0
It doesn't seem appropriate for arch/SOC to use a board-level functionality (CONFIG_OF_BOARD_FIXUP), because this prevents boards that need to do FDT fixup from using that feature. Also, this code is completely dead and useless (from comments by Rasmus Villemoes on the mailing list): - No in-tree imx8m-based board seems to set CONFIG_OF_BOARD_FIXUP - The nodes which that function wants to disable don't even exist in the U-Boot copy of imx8mp.dtsi. This code was introduced in commit 35bb60787b88. It seems to be some random import of code from downstream NXP U-Boot, with a commit message that makes no sense in upstream context. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-05-02imx: fix get_boot_device() for imx8Tim Harvey1-0/+2
commit 787f04bb6a0a ("imx: add USB2_BOOT type") broke get_boot_device() for IMX8 which affects booting from SDP due to boot_instance being non-zero. Fix this by only using boot_instance for imx8ulp and imx9. Fixes: 787f04bb6a0a ("imx: add USB2_BOOT type") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-05-02imx6: clock: print real pixel clock rateDario Binacchi1-0/+2
Add debug messages to print the real pixel clock rate, which may not be the requested one. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-05-02imx6: clock: add support to get LCD pixel clock rateDario Binacchi2-0/+60
Add the get_lcd_clk() function to get the LCD pixel clock rate. The patch has been tested on imx6ul platform. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-05-02imx6: clock: improve calculations to get the PLL video rateDario Binacchi1-1/+5
During some tests to check the pixel clock rate in the transition from U-Boot to the Linux kernel, I noticed that with the same configuration of the registers the debug messages reported different rates. The same Linux kernel calculations are now used to get the PLL video rate. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-02imx: support i.MX8QM DMSSE20 a1 boardOliver Graute3-0/+406
Add i.MX8QM DMSSE20 a1 board support U-Boot 2023.04-00030-g7be2f547b2 (Apr 21 2023 - 11:11:43 +0200) Model: Advantech iMX8QM DMSSE20 Board: DMS-SE20A1 8GB Build: SCFW 549b1e18, SECO-FW c9de51c0, ATF 5782363 Boot: USB DRAM: 8 GiB Core: 100 devices, 19 uclasses, devicetree: separate MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: eth0: ethernet@5b040000 Warning: ethernet@5b050000 (eth1) using random MAC address - 32:05:0c:f9:5e:10 , eth1: ethernet@5b050000 Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2023-05-02imx8mn: buffer overflow in low_drive_gpu_freq()Heinrich Schuchardt1-0/+2
Avoid a buffer overflow if assigned-clock-rates has less than two elements. Fixes: 98bcdf16356c ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-05-02board: mntre: imx8mq: Add MNT Reform 2 board supportPatrick Wildt2-0/+18
The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. Signed-off-by: Patrick Wildt <patrick@blueri.se> Tested-by: Vagrant Cascadian <vagrant@debian.org> Tested-by: Vagrant Cascadian <vagrant@debian.org> Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-04-28gpio: axp/sunxi: Remove virtual VBUS detection GPIOSamuel Holland1-1/+0
Now that this functionality is modeled using the device tree and regulator uclass, the named GPIO is not referenced anywhere. Remove it. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-28sunxi: binman: Fix U-Boot offset when SPL is not 32 KiBSamuel Holland1-1/+5
On sunxi boards, SPL looks for U-Boot at a 32 KiB offset, unless SPL is larger than 32 KiB, in which case U-Boot immediately follows SPL. See the logic in spl_mmc_get_uboot_raw_sector() and spl_spi_load_image(). In two cases, the existing binman description mismatches the SPL code. For 64-bit boards, binman would place U-Boot immediately following SPL, even if SPL is smaller than 32 KiB. This can happen when SPL MMC support is disabled (i.e. when booting from SPI flash). In contrast, for 32-bit boards, binman would place U-Boot at 32 KiB, even if SPL is larger than that. This happens because the 'offset' property does not consider the size of previous entries. Fix both issues by setting a minimum size for the SPL entry, which exactly matches the logic in the SPL code. Unfortunately, this size must be provided as a magic number, since none of the relevant config symbols (SPL_PAD_TO, SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, and SYS_SPI_U_BOOT_OFFS) are guaranteed to be defined in all cases. Fixes: cfa3db602caf ("sunxi: Convert 64-bit boards to use binman") Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-27corstone1000: add NVM XIP QSPI device tree nodeAbdellatif El Khlifi1-1/+8
add QSPI flash device node for block storage access Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
2023-04-26rockchip: Move to standard bootSimon Glass1-2/+1
Drop the distro-boot scripts and use standard boot instead. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Jonas Karlman <jonas@kwiboo.se>
2023-04-25arm: omap3: Directly use SMC #1 in lowlevel_init.SPali Rohár1-3/+3
Since commit de39dc71625d ("arm: armv7-a: Compile and tune for armv7-a instead of armv5") is used -march=armv7-a option for Omap3 platforms. With directive ".arch_extension sec" it is possible for -march=armv7-a to directly use ARM SMC instruction. So enable ".arch_extension sec" in Omap3 lowlevel_init.S and replace hand assembled ".word 0xe1600071" by "SMC #1". Since commit 51d063865064 ("arm: omap-common: add secure smc entry") same pattern is already used in arch/arm/cpu/armv7/omap-common/lowlevel_init.S. Signed-off-by: Pali Rohár <pali@kernel.org>
2023-04-25xen: Fix Kconfig dependenciesMichal Simek1-1/+0
XEN config can be enabled by other platforms (even it doesn't need to make sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires XEN to be enabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-04-25armv7: Use isb/dsb directly in start.STom Rini1-4/+4
Toolchains which do not directly support using "isb" and "dsb" directly are no longer functionally supported in U-Boot. Furthermore, clang has for a long time warned about using the alternate form that we were. Update the code. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25arm: Centralize fixed register logicTom Rini2-3/+8
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass -ffixed-r9. Rather than having this logic in two places, we can do this once in arch/arm/config.mk. Further, while gcc will ignore being passed both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will note that -ffixed-r9 is not used. Remove this duplication to also remove the warning. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25arm: Only support ARM64_CRC32 when using GCCTom Rini1-1/+1
Today, only gcc has __builtin_aarch64_crc32b (clang-16 does not, for example). Make this option depend on CC_IS_GCC. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25arm64: interrupts: print FAR_ELx on sync exceptionsPavel Skripkin1-1/+37
Default synchronous exceptions handler prints only esr and register dump. Sometimes it requiers to see an address which caused exceptions to understand what's going on ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or 0x35. Same applies for EL1. This patch adds function whivh determine current EL, gets correct FAR register and prints it on panic. Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
2023-04-25arch: mach-k3: j721s2_init: Disable the firewallsJayesh Choudhary1-0/+53
Some firewalls enabled by ROM are still left on. So some address space is inaccessible to the bootloader. For example, in OSPI boot mode we get an exception and the system hangs. Therefore, disable all the firewalls left on by the ROM. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-25armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is presentmeitao2-3/+13
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does. otherwise it will hang when enable mmu, that is what we encounter in our SOC. Signed-off-by: meitao <meitaogao@asrmicro.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/3bf38943aeab4700c2319bff2a1477d99c6afd2f
2023-04-25arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is presentMarc Zyngier2-4/+11
In order to make invalidation by VA more efficient, set the largest block mapping to 2MB, mapping it onto level-2. This has no material impact on u-boot's runtime performance, and allows a huge speedup when cleaning the cache. Signed-off-by: Marc Zyngier <maz@kernel.org> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8
2023-04-25arm64: Use FEAT_HAFDBS to track dirty pages when availableMarc Zyngier3-5/+26
Some recent arm64 cores have a facility that allows the page table walker to track the dirty state of a page. This makes it really efficient to perform CMOs by VA as we only need to look at dirty pages. Signed-off-by: Marc Zyngier <maz@kernel.org> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263
2023-04-24arm: mach-k3: am642: move do_dt_magic() after sysfw loadingWIP/2023-04-24-TI-platform-updatesChristian Gmeiner1-2/+2
Makes it possible to use e.g mcu_spi0 for custom board detection. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-04-24arm: mach-k3: common: re-locate authentication for atf/opteeManorit Chawdhry1-2/+33
For setting up the master firewalls present in the K3 SoCs, the arm64 clusters need to be powered on. Re-locates the code for atf/optee authentication. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am625-r5-sk: add a53 cluster powerManorit Chawdhry1-1/+2
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain nodeManorit Chawdhry1-1/+2
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am642-r5: add a53 cluster power domain nodeManorit Chawdhry1-1/+2
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-am642-r5-sk: add a53 cluster power domain nodeManorit Chawdhry1-1/+2
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j7200-r5: add a72 cluster power domain nodeManorit Chawdhry1-1/+2
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721e-r5: add a72 cluster power domain nodeManorit Chawdhry1-1/+2
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721e-r5-sk: add a72 cluster power domain nodeManorit Chawdhry1-1/+2
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: dts: k3-j721s2-r5: add a72 cluster power domain nodeManorit Chawdhry1-1/+2
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24arm: mach-k3: Remove empty sys_proto.h includeAndrew Davis8-18/+0
This header file is now empty, remove it. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-24arm: mach-k3: Move J721s2 SPL init functions to mach-k3Andrew Davis2-3/+64
This matches AM64 and J721e and removes the need to forward declare k3_spl_init(), k3_mem_init(), and check_rom_loaded_sysfw() in sys_proto.h. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
generated by cgit v1.1 at 2024-08-11 13:00:20 +0000