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2015-05-13ARM: Add board-specific initialization hook for PSCIJan Kiszka2-0/+7
Tegra boards will have to initialize power management for the PSCI support this way. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Make tegra_powergate_power_on publicJan Kiszka2-1/+2
Will be used for unpowergating CPUs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13virt-dt: Allow reservation of secure region when in a RAM carveoutJan Kiszka3-0/+36
In this case the secure code lives in RAM, and hence the memory node in the device tree needs to be adjusted. This avoids that the OS will map and possibly access the reservation. Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out such a region. We only support cutting off memory from the beginning or the end of a RAM bank as we do not want to increase their number (which would happen if punching a hole) for simplicity reasons This will be used in a subsequent patch for Jetson-TK1. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra124: Add more registers to struct mc_ctlrIan Campbell1-2/+33
I will need mc_security_cfg0/1 in a future patch and I added the rest while debugging, so thought I might as well commit them. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Put target PC for PSCI CPU_ON on per-CPU stackJan Kiszka2-9/+11
Use a per-CPU variable for saving the target PC during CPU_ON operations. This allows us to run this service independently on targets that have more than 2 cores and also core-local power control. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Factor out reusable psci_get_cpu_stack_topJan Kiszka2-10/+19
This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Factor out reusable psci_cpu_entryJan Kiszka2-18/+25
_sunxi_cpu_entry can be converted completely into a reusable psci_cpu_entry. Tegra124 will use it as well. As with psci_disable_smp, also the enabling is designed to be overloaded in cased SMP is not controlled via ACTLR. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Factor out reusable psci_cpu_off_commonJan Kiszka2-62/+78
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely cache disabling and flushing, clrex and the disabling of SMP for the dying CPU. These steps are apparently generic for ARMv7 and will be reused for Tegra124 support. As the way of disabled SMP is not architectural, though commonly done via ACLTR, the related function can be overloaded. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Factor out common psci_get_cpu_idJan Kiszka2-5/+15
Will be required for obtaining the ID of the current CPU in shared PSCI functions. The default implementation requires a dense ID space and only supports a single cluster. Therefore, the functions can be overloaded in cases where these assumptions do not hold. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditionsJan Kiszka7-10/+10
CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to be taken into account additionally. CONFIG_ARMV7_PSCI is only set on boards that support CONFIG_ARMV7_NONSEC, and it only works on those. CC: Tang Yuantian <Yuantian.Tang@freescale.com> CC: York Sun <yorksun@freescale.com> CC: Steve Rae <srae@broadcom.com> CC: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra124: video: Add full link training for eDPSimon Glass1-0/+4
Add full link training as a fallback in case the fast link training fails. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: video: support eDP displays on Tegra124 devicesSimon Glass1-0/+58
Connect up the clocks and the eDP driver to make these displays work with Tegra124-based devices. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: dts: nyan-big: Add definitions for eDP displaySimon Glass1-0/+43
Add the various host1x peripherals to allow an eDP display to be connected. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Move display controller header into commonSimon Glass3-12/+55
Allow this to be used by other Tegra SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra124: clock: Add display clocks and functionsSimon Glass5-9/+173
Add functions to provide access to the display clocks on Tegra124 including setting the clock rate for an EDP display. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: clock: Split the clock source code into a separate functionSimon Glass2-22/+40
Create a function which sets the source clock for a peripheral, given the number of mux bits to adjust. This can then be used more generally. For now, don't export it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: clock: Add checking for invalid clock IDsSimon Glass2-4/+29
The get_pll() function can do the wrong thing if passed values that are out of range. Add checks for this and add a function which can return a 'simple' PLL. This can be defined by SoCs with their own clocks. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra124: dts: Add host1x node to provide display informationSimon Glass1-0/+84
This peripheral is required to get the LCD display running. Add it to tegra124 and also bring in the binding file from Linux 3.18 Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: nyan-big: Add LCD PMIC init and board IDSimon Glass1-0/+4
Add required setup for the LCD display, and a function to provide the board ID. This requires GPIOs to be available prior to relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Provide a function to allow LCD PMIC setupSimon Glass1-0/+8
Some LCDs require a PMIC to be set up - add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Add a board ID functionSimon Glass1-5/+6
Add a way of displaying a numeric board ID on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Move checkboard() into the board codeSimon Glass1-8/+0
This is only used by Nvidia boards, so move it into nvidia/common to simplify things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: pwm: Allow the clock rate to be left as isSimon Glass2-2/+5
When enabling a PWM, allow the existing clock rate and source to stand unchanged. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-13tegra: Move the pwm into tegra-commonSimon Glass6-52/+80
This is needed for tegra124 also, so make it common and add a header file for tegra124. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-05-12arch: Make board selection choices optionalJoe Hershberger25-0/+26
By making the board selections optional, every defconfig will include the board selection when running savedefconfig so if a new board is added to the top of the list of choices the former top's defconfig will still be correct. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
2015-05-10stv0991: fdt: add stv0991 device treeVikas Manocha2-0/+24
This patch adds device tree for the ST Micro stv0991 board & enables device tree control. Progressively device tree support for the drivers being used will also be added. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-10stm32f4: add serial print portkunhuahuang1-0/+32
Add the stm32F4 board's serial ports support. User can use it easily. The user only need to edit the number of the usart. The patch also fix the serial print out. Last, this version of patch fix the first patch checkpatch.pl error. Thanks to Kamil Lulko. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
2015-05-07ARM: socfpga: abolish CONFIG_SOCFPGAMasahiro Yamada2-2/+2
Replace CONFIG_SOCFPGA with CONFIG_ARCH_SOCFPGA. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07ARM: socfpga: move SoC headers to mach-socfpga/include/machMasahiro Yamada13-0/+0
Move headers to mach-socfpga as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07ARM: socfpga: move SoC sources to mach-socfpgaMasahiro Yamada13-1/+1
Our recent trend is to collect SoC files into arch/arm/mach-(SOC). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07ARM: socfpga: move board select into mach-socfpga/KconfigMasahiro Yamada2-11/+31
Switch to a more standard way of board select; put the SoC select into arch/arm/Kconfig and move the board select menu under arch/arm/mach-socfpga/Kconfig. Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07ARM: socfpga: remove redundant config.mkMasahiro Yamada1-8/+0
Because all the SOCFPGA boards define CONFIG_SPL_FRAMEWORK (see include/configs/socfpga_common.h), u-boot.img is automatically added to the target image list by the top Makefile. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-07ARM: socfpga: do not add board directory to header search pathMasahiro Yamada1-3/+0
The compiler option "-Iboard/$(VENDOR)/$(BOARD)" just exists here for iocsr_config.c to be able to include iocsr_config.h. Use "..." instead of <...> to include a header in the same directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-05Merge git://git.denx.de/u-boot-marvellTom Rini21-51/+143
2015-05-05arm: mvebu: Remove "u-boot.kwb" CONFIG_BUILD_TARGET for non-SPL targetsStefan Roese1-2/+0
By removing this default build target, the "u-boot.kwb" target is not automatically generated. This fixes a temporary build error when using out-of-tree builds, as buildman does per default (reported by Simon). When the full SPL support is added for these targets with the DDR training code, the "u-boot-spl.kwb" image will be generated automatically. Users providing a special bin_hdr binary (binary.0) file can always add this binary file and generate the full firmware image by issuing the "make u-boot.kwb" command directly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-05-05arm: mvebu: Add Armada A38x DB-88F6820-GP board supportStefan Roese1-0/+6
This patch adds support for the Marvell DB-88F6820-GP Armada A38x evaluation board. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Please note that this board support right now only supports the main U-Boot. Without the bin_hdr integration (DDR training etc). This will be added in a few days / weeks to complete this board port. But till then this U-Boot version can be run on the target via the original Marvell U-Boot via this command: tftpboot 4000000 db-88f6820-gp/u-boot.bin;go 4000000 Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Add d-cache invalidate before enabling the d-cacheStefan Roese1-0/+3
This solves some RX problems that have been seen, when using the mvneta ethernet driver. The cache needs to be reset into a "clean" state before using it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Remove coherency configurationStefan Roese1-3/+0
We are not using the coherency feature in U-Boot at all. So lets remove this configuration from the mbus driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Change network init code to allow a more flexible setupStefan Roese1-4/+16
With the introduction of the Armada 38x support, its necessary to change the mvneta ethernet driver init call from always 4 times to a configurable value. Lets make this init call more flexible by moving the actually used devices to the config header. Additionally this patch takes care of the slightly different base addresses for the ethernet controllers on A38x. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-05arm: mvebu: Add basic Armada 38x supportStefan Roese3-16/+73
This patch adds support for the Marvell Armada 38x SoC family. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Tested on Marvell DB-88F6820-GP evaluation board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Move CONFIG_SPL_LDSCRIPT to common headerStefan Roese1-0/+5
This way, new MVEBU boards don't need to specifiy the common location for the SPL linker script. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Only define MV88F78X60 for Armada XPStefan Roese1-1/+3
This define is used by the DDR training code for Armada XP. With the upcoming addition of Armada 38x support, lets only define it for Armada XP in this common header. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Remove unreferenced defineStefan Roese1-3/+0
MAX_MVNETA_DEVS is not used anywhere in U-Boot. So lets remove it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Change header macros from ARMADA_XP to MVEBUStefan Roese3-10/+10
Since these files will be used for other MVEBU SoC's, lets reflect this in the headers marcos as well. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Move mvebu-common into mach-mvebuStefan Roese12-3/+18
Now that the mach-mvebu directory exists and is used by Armada XP we can move the mvebu-common files into this directory as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: armada-xp: Move SoC headers to mach-mvebu/include/machStefan Roese4-1/+1
Move arch/arm/include/asm/arch-armada-xp/* -> arch/arm/mach-mvebu/include/mach/* Additionally the SYS_SOC is renamed from "armada-xp" to "mvebu". With this change all these files can better be shared with other, newer Mavell MVEBU SoC's. Like the upcoming Armada 38x support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: armada-xp: Move SoC sources to mach-mvebuStefan Roese6-1/+1
Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/* Since this platform will be extended to support other Marvell SoC's as well, lets rename it directly to mvebu. This will be used by the upcoming Armada 38x suport (A38x). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini6-10/+111
2015-05-05Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD140-468/+4476
2015-05-04sunxi: usb: Protect phy-init and phy-power-on against multiple callsHans de Goede1-0/+18
Once we add support for the ohci controller the phy-init and phy-power-on functions may be called twice (once by the ehci code and once by the ohci code) protect them against this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
generated by cgit v1.1 at 2024-07-14 02:06:05 +0000