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2023-10-30Kconfig: Remove all default n/no optionsMichal Simek1-1/+0
Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all default n/no options") and again sync is required. default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
2023-10-06spl: Enable CONFIG_SPL_SYS_MALLOC_F where neededSimon Glass1-0/+3
Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_SPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-13clocks: qcs404: Add support for I2C clocksSumit Garg2-0/+75
Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl: qcs404: Enable I2C pinmux optionsSumit Garg1-0/+6
Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10clock-snapdragon: Add clk_rcg_set_rate() with mnd_width=0Sumit Garg2-0/+26
Add clk_rcg_set_rate() which allows to configure clocks without programming MND values. This is required for configuring I2C clocks on QCS404. Co-developed-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Mike Worsfold <mworsfold@impinj.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl-snapdragon: Get rid of custom drive-strength valuesSumit Garg1-1/+7
Use standard pinconf drive-strength values from Linux DT bindings rather than ones based on custom u-boot header. These changes are in direction to make u-boot DTs for Qcom SoCs to be compatible with standard Linux DT bindings. Also, add support for pinconf bias-pull-up. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10pinctrl: qcs404: Enable ethernet pinmux optionsSumit Garg1-0/+7
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10clocks: qcs404: Add support for ethernet clocksSumit Garg2-0/+74
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10qcs404: sysmap: Don't map reserved memory rangesSumit Garg1-1/+13
Currently u-boot maps whole of 1G RAM but there reserved memory ranges on QCS404 which are reserved for TrustZone, various firmware components etc. Any access to these reserved memory ranges causes a bus hang issue. So disable mapping for reserved memory ranges in u-boot. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-01-10SoC: sdm845: find and save KASLR to env variablesDzmitry Sankouski1-0/+18
KASLR address is needed to boot fully functional Android. KASLR is set by primary bootloader, and since u-boot is used as a secondary bootloader(replacing kernel) on sdm845 platform, KASLR may be found by comparing memory chunks at relocaddr over supposed KASLR range. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-12-07global: Remove extraneous DM_ETH imply/selectTom Rini1-2/+0
We only need to enable DM_ETH if we have a networking driver. All networking drivers depend on DM_ETH being enabled, and their selection ensures DM_ETH will be enabled. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-26arm: dts: qcom: Sync pinctrl DT nodes with Linux bindingsSumit Garg1-4/+33
Currently for all Qcom SoCs/boards there are separate compatibles for GPIO and pinctrl. But this is inconsistent with official (upstream) Linux bindings which requires only a single compatible "qcom,<SoC name>-pinctrl" and there is no such compatible property as "qcom,tlmm-<SoC name>". So fix this inconsistency for Qcom SoCs in order to comply with upstream DT bindings. This is done via removing compatibles from "msm_gpio" driver and via binding to "msm_gpio" driver from pinctrl driver in case "gpio-controller" property is specified for pinctrl node. Suggested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26pinctrl: sdm845: Remove redundant CONFIG_SDM845 checkSumit Garg2-3/+1
DT compatible is sufficient to make platform specific differentiation, so remove redundant CONFIG_SDM845 check. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-26clocks: qcs404: Add support for USB clocksSumit Garg2-0/+52
Add support for USB controller and PHY clocks for QCS404 SoC. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26clocks: qcom: Add clock enable callback supportSumit Garg5-0/+27
Drivers like USB, ethernet etc. uses ".enable" hook to enable clocks. So add corresponding support for Qcom clock drivers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25board: qualcomm: Add support for QCS404 EVBSumit Garg3-0/+44
Add support for Qualcomm QCS404 SoC based evaluation board. Features: - Qualcomm Snapdragon QCS404 SoC - 1GiB RAM - 8GiB eMMC, uSD slot U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qcs404.rst. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25clocks: qcom: Add clock driver for QCS404 SoCSumit Garg3-0/+120
Currently this clock driver initializes clocks for UART and eMMC. Along with this import "qcom,gcc-qcs404.h" header from Linux mainline to support DT bindings. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25pinctrl: qcom: Add pinctrl driver for QCS404 SoCSumit Garg4-0/+58
Currently this pinctrl driver only supports BLSP UART2 specific pin configuration. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25board: qualcomm: Add support for dragonboard845cSumit Garg1-0/+14
Add support for 96Boards Dragonboard 845C aka Robotics RB3 development platform. This board complies with 96Boards Open Platform Specifications. Features: - Qualcomm Snapdragon SDA845 SoC - 4GiB RAM - 64GiB UFS drive U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/sdm845.rst, board: dragonboard845c. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25clocks: sdm845: Import qcom,gcc-sdm845.hSumit Garg1-1/+2
Rather than using magic numbers as clock ids for peripherals import qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids. So start using corresponding clk-id macro for debug UART. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-10-31board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) boardDzmitry Sankouski1-0/+17
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, for China \ Hong Kong markets. Has unlockable bootloader, unlike SM-G960U (American market version), which allows running u-boot as a chain-loaded bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31SoC: qcom: add support for SDM845Dzmitry Sankouski5-0/+163
Hi-end qualcomm chip, introduced in late 2017. Mostly used in flagship phones and tablets of 2018. Features: - arm64 arch - total of 8 Kryo 385 Gold / Silver cores - Hexagon 685 DSP - Adreno 630 GPU Tested only as second-stage bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Stephan Gerhold <stephan@gerhold.net>
2021-10-31clocks: qcom: add clocks for SDM845 debug uartDzmitry Sankouski3-1/+95
Allows to change clock frequency of debug uart, thus supporting wide range of baudrates. Enable / disable functionality is not implemented yet. In most use cases of SDM845 (i.e. mobile phones and tablets) it's not needed, because qualcomm first stage bootloader leaves it initialized, and on the other hand there's no possibility to replace signed first stage bootloader with u-boot. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoCDzmitry Sankouski3-0/+48
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephan Gerhold <stephan@gerhold.net> [trini: Add CONFIG_SDM845 around sdm845_data usage]
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-1/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-02arm: mach-snapdrgon: misc: Simplify msm_generate_mac_addr()Stephan Gerhold1-11/+10
The logic in msm_generate_mac_addr() was originally taken from the LK bootloader where the serial number is a string and must be parsed first. However, in U-Boot msm_board_serial() returns an u32 and msm_generate_mac_addr() has quite complicated code that will first print it as a hex string and then immediately parse it again. What this function actually does at the end is to put the serial number encoded as big endian (the order used for the hex string) into the u8 *mac. Use put_unaligned_be32() to do that with bit shifts instead of going through the string format. This should be slightly more efficient and cleaner but does not result in any functional difference. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-02arm: mach-snapdragon: misc: Initialize eMMC if necessaryStephan Gerhold1-0/+3
At the moment U-Boot produces an empty MAC address (02:00:00:00:00:00) if the eMMC is not used by anything in U-Boot (e.g. with CONFIG_ENV_IS_NOWHERE=y instead of having the environment on eMMC). This happens because then there is nothing that actually initializes the eMMC and reads the "cid" that is later accessed. To fix this, call mmc_init() to ensure the eMMC is initialized. There is no functional difference if the eMMC is already initialized since then mmc_init() will just return without doing anything. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass1-1/+1
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-23board: dragonboard410c: Load U-Boot directly without LKStephan Gerhold2-0/+55
At the moment the U-Boot port for the DragonBoard 410c is designed to be loaded as an Android boot image after Qualcomm's Little Kernel (LK) bootloader. This is simple to set up but LK is redundant in this case, since everything done by LK can be also done directly by U-Boot. Dropping LK entirely has at least the following advantages: - Easier installation/board code (no need for Android boot images) - (Slightly) faster boot - Boot directly in 64-bit without a round trip to 32-bit for LK So far this was not possible yet because of unsolved problems: 1. Signing tool: The firmware expects a "signed" ELF image with extra (Qualcomm-specific) ELF headers, usually used for secure boot. The DragonBoard 410c does not have secure boot by default but the extra ELF headers are still required. 2. PSCI bug: There seems to be a bug in the PSCI implementation (part of the TrustZone/tz firmware) that causes all other CPU cores to be started in 32-bit mode if LK is missing in the boot chain. This causes Linux to hang early during boot. There is a solution for both problems now: 1. qtestsign (https://github.com/msm8916-mainline/qtestsign) can be used as a "signing" tool for U-Boot and other firmware. 2. A workaround for the "PSCI bug" is to execute the TZ syscall when entering U-Boot. That way PSCI is made aware of the 64-bit switch and starts all other CPU cores in 64-bit mode as well. Simplify the dragonboard410c board by removing all the extra code that is only used to build an Android boot image that can be loaded by LK. This allows dropping the custom linker script, special image magic, as well as most of the special build/installation instructions. CONFIG_REMAKE_ELF is used to build a new ELF image that has both U-Boot and the appended DTB combined. The resulting u-boot.elf can then be passed to the "signing" tool (e.g. qtestsign). The PSCI workaround is placed in the "boot0" hook that is enabled with CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK. The extra check for EL1 allows compatibility with custom firmware that enters U-Boot in EL2 or EL3, e.g. qhypstub (https://github.com/msm8916-mainline/qhypstub). As a first step these changes apply only to DragonBoard410c. Similar changes could likely also work for the DragonBoard 820c. Note that removing LK wouldn't be possible that easily without a lot of work already done three years ago by Ramon Fried. A lot of missing initialization, pinctrl etc was already added back then even though it was not strictly needed yet. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-07-14arm: mach-snapdragon: pinctrl: Place pin_name in .data sectionStephan Gerhold2-3/+2
According to arch/arm/lib/crt0_64.S, the BSS section is "UNAVAILABLE" and uninitialized before relocation. Also, it overlaps with the appended DTB before relocation, so writing data into a variable in the BSS section might corrupt the appended DTB. Unfortunately, pinctrl-apq8016.c and pinctrl-apq8096.c do place the "pin_name" variable in the BSS section (since it's uninitialized). It's also used before relocation, when setting up the pinctrl for the serial driver. On DB410c this causes "GPIO_5" to be written into some part of an appended DTB, e.g.: 80111820: edfe0dd0 9f100000 38000000 c00e0000 ...........8.... 80111830: 28000000 11000000 10000000 00000000 ...(............ 80111840: 4f495047 8800355f 00000000 00000000 GPIO_5.......... 80111850: 00000000 00000000 01000000 00000000 ................ 80111860: 03000000 04000000 00000000 02000000 ................ 80111870: 03000000 04000000 0f000000 02000000 ................ 80111880: 03000000 2d000000 1b000000 6c617551 .......-....Qual 80111890: 6d6d6f63 63655420 6c6f6e68 6569676f comm Technologie Depending on the part of the DTB that is corrupted this might not cause any problems, but it can also result in strange reboots without any serial output. Fortunately, in practice this does not cause issues on DB410c yet because board_fdt_blob_setup() in dragonboard410c.c currently overrides the appended DTB with the one passed by the previous bootloader (LK) (which does not get corrupted). DB820c does not have board_fdt_blob_setup() so I would expect it to be affected by this problem. Perhaps everyone was just fortunate to not compile an U-Boot configuration where the pin_name corrupts an important part of the DTB. Make sure "pin_name" is explicitly placed in the .data section instead of .bss to fix this. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06arm: snapdragon: Fix typo in clk_bcr_update()Sheep Sun1-5/+5
Fix typo in clock-snapdragon.c Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
2021-07-06arm: snapdragon: Use correct GICC register on APQ8016Sheep Sun1-1/+1
The GICC register used by u-boot is 0x0a20c000, which is actually a GICC for WCNSS, the WLAN processor. U-boot runs on the Application Processor, therefore it should use APCS GICC instead. Hence, correct it with APCS GICC register address. Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-1/+1
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2-2/+2
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2-2/+2
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2-2/+2
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2-2/+2
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop part.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-03mach-snapdragon: Fix overwriting last digit of serial numberJan-Christoph Tebbe1-1/+1
When generating the MAC address based on the boards serial number the last digit was overwritten with the null termination. That way boards with serial numbers close to each other would use the same MAC address. Signed-off-by: Jan-Christoph Tebbe <Jan-Christoph.Tebbe@ithinx.io>
2019-01-25arm: mach-snapdragon: pinctrl: clarify gpio disable bitRamon Fried1-2/+2
The TLMM_GPIO_ENABLE bit is actually use to disable the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: mach-snapdragon: add pinctrl driver for db820cRamon Fried4-3/+61
Add pinctrl driver for Dragonboard820c, currently with only one mux func to initialize pins for serial console. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-25arm: mach-snapdragon: db820c: Actually init PLL for serialRamon Fried2-0/+43
The PLL for the UART was not set, and relied on previous initializtion made by LK. add the appropriate initialization. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-18mach-snapdragon: db410: pinctrl: fix pin countRamon Fried1-3/+3
Pin count in APQ8016 was wrong, fix that. Fixes: ad97051b7ff6 ("mach-snapdragon: Introduce pinctrl driver") Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30db410c: serial# env using msm board serialRamon Fried1-0/+1
The serial# environment variable needs to be defined so it will be used by fastboot as serial for the endpoint descriptor. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13snapdragon: added MAC generation functionsRamon Fried2-0/+17
Add support for generation of unique MAC address that is derived from board serial. Algorithm for generation of MAC taken from LK. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13snapdragon: added msm_board_serial() funcRamon Fried3-0/+50
This commit adds a function to get the board serial number. In snapdragon it's actually the eMMC serial number. Function added in a new file misc.c that will include further snapdragon miscellaneous functions. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-10snapdragon: Add DRAM detection & FDT fixupRamon Fried3-0/+111
Fixup the Linux FDT with the detection of onboard DRAM as provided by SBL (Secondary boot loader) by reading the shared-memory region. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-29mach-snapdragon: increase size of malloc poolRamon Fried1-0/+6
Pool size must be increased to support new additionals drivers. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
generated by cgit v1.1 at 2024-07-14 21:07:32 +0000