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2019-04-09pinctrl: renesas: Add R8A77965 pin control tablesMarek Vasut1-1/+1
Add pin control tables for R8A77965 from Linux 5.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09clk: renesas: Add R8A77965 clock tablesMarek Vasut1-1/+1
Add clock tables for R8A77965 from Linux 5.0 , except for the crit, R and Z clock, which are neither used nor supported by the U-Boot clock framework yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: rmobile: Add dedicated R8A77965 SoC supportMarek Vasut1-0/+7
Add dedicated entry for R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: rmobile: Enable multi-DTB fit LZO compressionMarek Vasut1-0/+17
Enable LZO compression of the multi-DTB fitImages, since the U-Boot with multiple DTs enabled is becoming quite large and the DTs can be well compressed. The LZO compression saves almost 200 kiB on the Salvator-X(S) and ULCB targets. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09ARM: renesas: Save boot parameters passed in by ATFMarek Vasut1-0/+15
The ATF can pass additional information via the first four registers, x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer to a device tree with platform information. Save these registers for future use. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25ARM: rmobile: Imply SoC per boardMarek Vasut1-4/+10
Imply all SoCs supported by a given board. This allows building single U-Boot binary for boards which can have multiple SoCs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25ARM: rmobile: Imply pinctrl drivers per SoCMarek Vasut2-0/+10
Imply preferred pin control driver per SoC, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-02-25ARM: rmobile: Imply clock drivers per SoCMarek Vasut2-0/+10
Imply preferred clock driver per SoC, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-07ARM: rmobile: Fix to enable icache early in Gen3Takeshi Kihara2-3/+5
This patch fixes the problem that u-boot will not start unless icache is enabled early. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-07ARM: rcar_gen3: fix protection area access errorTakeshi Kihara1-2/+10
This patch fixes the problem that "main memory domain AXI secure access protection error" occurs. Exclude the area (0x43f00000 to 0x47DFFFFF) set by DBSC from the map area. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-07ARM: rcar_gen3: fix protection area access error at Cortex-A53Hiroyuki Yokoyama1-1/+7
This patch fixes the problem that "main memory domain AXI secure access protection error" occurs when booting Cortex-A53. Exclude the area (0x43f00000 to 0x47DFFFFF) set by DBSC from the map area. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-04ARM: rmobile: Set environment variable containing CPU typeMarek Vasut1-9/+32
Set environment variable 'platform' containing the CPU type. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04ARM: rmobile: Enable MMC extensionsMarek Vasut1-0/+5
Enable extended MMC commands and GPT partition table support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
2018-11-02ARM: rmobile: Generate fitting mem_map on Gen3Marek Vasut2-1/+91
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire 64bit DRAM space as cachable. On CortexA57, this might result in odd side effects, where the CPU tries to prefetch from those areas and if there is no DRAM backing them, CPU bus hang can happen. This patch fixes it by generating the mem_map structure based on the actual memory layout obtained from the DT, thus not marking areas without any DRAM behind them as cachable. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3") Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-18ARM: rmobile: Drop PRR syscon driverMarek Vasut1-53/+8
The PRR syscon driver is available too late for Multi DTB build of U-Boot. Replace it with simple check whether a platform is Gen3 or not and produce an address of the PRR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-18ARM: rmobile: Enable cache command on Gen3Hiroyuki Yokoyama1-0/+1
This patch enables the cache command, mostly for convenience of testing. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-03ARM: rmobile: Enable PHY framework on Gen3Marek Vasut1-0/+1
Enable PHY framework on Gen3, this is required for USB EHCI PHY support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03ARM: rmobile: Mark 4-64GiB as DRAM on Gen3Marek Vasut1-0/+6
Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the chip is capable of addressing that and U-Boot can make use of it. This patch prevents exception when accessing those areas. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-14ARM: rmobile: Enable USB PHY on Gen2Marek Vasut1-0/+2
Enable support for USB PHY on the R-Car Gen2. This allows for both of the USB host ports to be used on such boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-07-30dm: Change CMD_DM enablingMichal Simek1-0/+8
CMD_DM is used for debug purpose and it shouldn't be enabled by default via Kconfig. Unfortunately this is in the tree for quite a long time that's why solution is to use imply DM for all targets which are enabling DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30Kconfig: Sort bool, default, select and imply optionsMichal Simek1-7/+7
Fix Kconfig bool, default, select and imply options to be alphabetically sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-07-25ARM: rmobile: gen2: Enable ACTLR[0] (Enable invalidates of BTB) to ↵Marek Vasut1-0/+4
facilitate CVE_2017-5715 WA in OS Enable CVE_2017_5715 mitigation on CPU0 on R-Car H2, M2W, M2N, V2H, which all contain Cortex-A15 cores. R-Car E2 contains only Cortex-A7 cores and is not affected. Without this enabled, Linux kernel reports: CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable With this enabled, Linux kernel reports: CPU0: Spectre v2: using ICIALLU workaround NOTE: This by itself does not enable the workaround for other CPUs than CPU0 and may require additional kernel patches for the other CPUs in SMP configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: renesas: Add R8A77990 E3 Ebisu boardMarek Vasut1-0/+6
Add support for the R8A77990 Ebisu board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: renesas: Add R8A77990 E3 SoC IDMarek Vasut3-0/+5
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Unify Gen2 Makefile entryMarek Vasut1-7/+3
Drop per-SoC Makefile entries and replace them with one unified entry now that the PFC tables are gone. Shuffle the Makefile around a bit to make it more organized. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Drop old R8A7794 PFC tablesMarek Vasut4-1930/+1
All the boards use new modern PFC framework, the old PFC tables are no longer used, so remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Drop old R8A7793 PFC tablesMarek Vasut4-2367/+1
All the boards use new modern PFC framework, the old PFC tables are no longer used, so remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Drop old R8A7792 PFC tablesMarek Vasut4-2525/+1
All the boards use new modern PFC framework, the old PFC tables are no longer used, so remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Drop old R8A7791 PFC tablesMarek Vasut4-1558/+1
All the boards use new modern PFC framework, the old PFC tables are no longer used, so remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Drop old R8A7790 PFC tablesMarek Vasut4-2204/+1
All the boards use new modern PFC framework, the old PFC tables are no longer used, so remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20ARM: rmobile: Update V2H BlancheMarek Vasut1-0/+1
The V2H Blanche port was broken since some time. This patch updates the V2H Blanche port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-10SPDX: Convert a few files that were missed beforeTom Rini1-2/+1
As part of the main conversion a few files were missed. These files had additional whitespace after the '*' and before the SPDX tag and my previous regex was too strict. This time I did a grep for all SPDX tags and then filtered out anything that matched the correct styles. Fixes: 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style") Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla1-1/+1
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07regmap: clean up regmap allocationMasahiro Yamada1-1/+1
Putting zero length array at the end of struct is a common technique to embed arbitrary length of members. There is no good reason to let regmap_alloc_count() branch by "if (count <= 1)". As far as I understood the code, regmap->base is an alias of regmap->ranges[0].start, but it is not helpful but make the code just ugly. Rename regmap_alloc_count() to regmap_alloc() because the _count suffix seems pointless. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: fixup cpu_info-rcar.c] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini32-70/+37
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-02ARM: rmobile: Contain CONFIG_ARCH_RMOBILE_BOARD_STRINGMarek Vasut2-8/+2
Pull the symbol from the boards and zap struct rmobile_sysinfo as they are rather useless. The entire purpose of that whole machinery was to print board name in the CONFIG_ARCH_RMOBILE_BOARD_STRING. Do that in a far simpler and more contained manner. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02ARM: rmobile: Convert CONFIG_ARCH_RMOBILE_BOARD_STRING to KconfigMarek Vasut1-0/+4
Convert the symbol to Kconfig, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26ARM: rmobile: Update E2 AltMarek Vasut1-0/+3
The E2 Alt port was broken since some time. This patch updates the E2 Alt port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26ARM: rmobile: Update M2-N GoseMarek Vasut1-0/+3
The M2-N Gose port was broken since some time. This patch updates the M2-N Gose port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26ARM: rmobile: Update H2 LagerMarek Vasut1-0/+3
The H2 Lager port was broken since some time. This patch updates the H2 Lager port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-21ARM: rmobile: Update E2 SilkMarek Vasut1-0/+3
The E2 Silk port was broken since some time. This patch updates the E2 Silk port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- NOTE: The port is missing support for I2C1 for DA9063 reset, since the I2C driver needs to be converted to DM and DT probing. That's not an issue for this patch though, since the reset was broken on Silk since forever.
2018-04-17ARM: rmobile: Update M2 KoelschMarek Vasut1-0/+3
The M2 Koelsch port was broken since some time. This patch updates the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13ARM: rmobile: Convert TPL to SPLMarek Vasut3-9/+5
There is currently no use for building the SPL anymore, since the SPI loader can easily be replaced by TPL and TPL does load U-Boot directly. Upgrade TPL to SPL and replace what used to be SPL with it. This way we build the U-Boot sources only twice, not thrice. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13ARM: rmobile: Shrink the TPLMarek Vasut1-0/+4
Shrink the TPL by using tiny printf and tiny memset by default. This removes the biggest symbol -- vsnprintf_internal -- from the TPL and reduces the text segment by about 2 kiB. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-13ARM: rmobile: Update H2 StoutMarek Vasut1-0/+3
The H2 Stout port was broken since some time. This patch updates the H2 Stout port to use modern frameworks, DM, DT probing, SPL and TPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: rmobile: Fix the memory map on Gen3Marek Vasut3-87/+9
Fix up the memory map on Gen3 to match datasheet properly. This simplifies the memory map setup as well, since we do no longer need this massive complexity. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: rmobile: Add JTAG recovery support for M2 PorterMarek Vasut1-0/+24
Add JTAG recovery support into the M2 Porter TPL. This allows the TPL to be loaded over JTAG, initialize the system, wait for the JTAG debugger to load U-Boot image into RAM and then resume and start U-Boot from RAM. The procedure is as follows: 1) Load u-boot-tpl.bin to 0xe6300000 2) Write magic number 0x1337c0de to 0xe6300020 TPL checks for this particular magic and starts JTAG recovery if this number is present. This is not present by default. 3) Start U-Boot TPL from 0xe6300000 4) Wait for a message from TPL on UART indicating JTAG boot: "JTAG boot detected!" 5) Halt the system in JTAG debugger 6) Load U-Boot image (u-boot.img) to 0x4fffffc0 7) Write magic number 0xb33fc0de to 0xe6300024 TPL checks for this particular magic to verify that the U-Boot image was loaded into DRAM by the JTAG debugger. 8) Resume the system in JTAG debugger Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: rmobile: Add TPL support on R8A7791 M2 PorterMarek Vasut1-0/+1
Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due to the Gen2 BootROM restriction. The TPL is running from MERAM and is capable of performing the initial initialization of PFC, Clock, GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up the DDR DRAM access. The TPL is capable of loading the next stage, U-Boot, from either SPI NOR or UART as a fallback. If either does provide a valid U-Boot uImage, the system stops, which allows the operator to load U-Boot ie. via JTAG and start it manually. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11ARM: rmobile: Do not init caches in TPL before DRAMMarek Vasut1-0/+2
Skip the cache initialization, which can be done later on in U-Boot proper, since this interferes with early DRAM initialization in TPL. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05ARM: rmobile: Add R8A77965 M3N IDsMarek Vasut3-0/+3
Add CPU and PRR IDs for R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>