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2022-06-30Merge tag 'u-boot-at91-2022.10-a' of ↵WIP/30Jun2022-nextTom Rini1-0/+1
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2022.10 cycle: This feature set includes mostly fixes and alignments: DT alignment with Linux for sama7g5, removal of invalid eeprom compatibles, removal of extra debug_uart_init calls for all at91 boards, support for pio4 driver pioE bank, and other minor fixes and enhancements for sam9x60 and sama5d2_icp boards.
2022-06-30gpio: atmel_pio4: add support for PIO_PORTEMihai Sain1-0/+1
Add support for gpio PORT E, which is available on e.g. sama7g5 SoC. Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-06-28spl: Move SPL_LDSCRIPT defaults to one placeTom Rini1-4/+0
We want to keep all of the default values for SPL_LDSCRIPT in the same place both for overall clarity as well as not polluting unrelated config files. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28Convert CONFIG_EFLASH_PROTSECTORS to KconfigTom Rini2-2/+9
This converts the following to Kconfig: CONFIG_EFLASH_PROTSECTORS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-23linker_lists: Rename sections to remove . prefixAndrew Scull2-2/+2
Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-04-26ARM: mach-at91: armv7: Remove default reset driverSergiu Moga2-34/+0
This commit removes the default reset driver for armv7, since it is no longer needed due to the presence of the SYSRESET driver. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26ARM: mach-at91: arm926ejs: Add SYSRESET conditionalSergiu Moga1-0/+2
This commit adds a condition to the Makefile so that whenever the SYSRESET option is chosen in the configuration, the default reset driver is ignored. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-04-26board: Add sam9x60_curiosity supportDurai Manickam KR1-0/+7
Add board files, Kconfig, Makefile and MAINTAINERS. Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
2022-04-08at91: Remove unused LED codeTom Rini2-48/+0
These LED files (and CONFIG values) are unused today, remove the code in question. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01timer: atmel_tcb_timer: add atmel_tcb driverClément Léger1-0/+2
Add a driver for the timer counter block that can be found on sama5d2. This driver will be used when booting under OP-TEE since the pit timer which is part of the SYSC is secured. Channel 1 & 2 are configured to be chained together which allows to have a 64bits counter. Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2022-04-01ARM: at91: sama7g5: Reset external devices at software resetTudor Ambarus1-0/+1
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external devices. This is particular useful for external devices that are configured in stateful modes which can not be undone without reconfiguring the device or without resetting the device. An example is an SPI NOR flash that is configured in octal mode. The do_reset u-boot cmd does not call any driver's remove method, but merely resets the CPU. As the code was, this left the flash in octal mode, being impossible for the first stage boot loaders to recover/identify the flash after a "software reset". RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset" to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL field and reset the external devices (including the SPI NOR flash in the example). nrst_out is always asserted at "user reset" and it resets the external devices correctly. Asserting nrst_out at "software reset" should behave in a similar way. The only difference that I could find between the two types of resets in regards to the nrst_out signal, is that at "user reset" timing diagram the "Processor and Peripherals Reset Line" rises after six MD_SLCK cycles after the nrst_out line rose, while at the "software reset" timing diagram the "Processor and Peripherals Reset Line" is active for 3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset" case the nrst_out signal can be active for a longer period of time than the "Processor and Peripherals Reset Line" active time, depending on the RSTC_MR.ERSTL value. Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01configs: Convert AT91RESET_EXTRST to KconfigTudor Ambarus1-0/+3
Convert AT91RESET_EXTRST to Kconfig for easier integration. The symbol is not configurable from menuconfig, it will be automatically selected by SoCs that select it explicitly via the "select" directive. AT91RESET_EXTRST sets the Reset Controller's RSTC_CR.EXTRST bit which asserts the nrst_out pin that resets external devices. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-04-01ARM: at91: sama5d2: Enable the use of Galois Tables from ROMTudor Ambarus1-3/+7
sama5d2 contains in its ROM memory BCH code tables for NAND Flash ECC correction. Enable the use of the GF tables defined in ROM. This should speed up the boot process, as the tables are no longer constructed at runtime. Tested with sama5d2-ptc-ek. Reported-by: David Mosberger-Tang <davidm@egauge.net> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2022-03-25Convert CONFIG_AT91_WANTS_COMMON_PHY to KconfigTom Rini1-0/+9
This converts the following to Kconfig: CONFIG_AT91_WANTS_COMMON_PHY Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18Convert CONFIG_ATMEL_LEGACY to KconfigTom Rini1-0/+3
This converts the following to Kconfig: CONFIG_ATMEL_LEGACY Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18Convert CONFIG_AT91_GPIO_PULLUP to KconfigTom Rini1-0/+4
This converts the following to Kconfig: CONFIG_AT91_GPIO_PULLUP Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18Convert CONFIG_AT91SAM9260 et al to KconfigTom Rini1-0/+1
This converts the following to Kconfig: CONFIG_AT91SAM9260 CONFIG_AT91SAM9G20 CONFIG_AT91SAM9XE CONFIG_AT91SAM9261 CONFIG_AT91SAM9263 CONFIG_AT91SAM9G45 CONFIG_AT91SAM9M10G45 CONFIG_AT91SAM9N12 CONFIG_AT91SAM9RL CONFIG_AT91SAM9X5 CONFIG_SAM9X60 CONFIG_SAMA7G5 CONFIG_SAMA5D2 CONFIG_SAMA5D3 CONFIG_SAMA5D4 These options are already select'd as needed, so we're just cleaning up files here. Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-21Convert CONFIG_AT91_EFLASH to KconfigPatrick Delaunay1-0/+8
This converts the following to Kconfig: CONFIG_AT91_EFLASH Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-12-16ARM: mach-at91: Add compile time option to choose proper timerHari Prasath1-2/+5
New SoC's of AT91 family with ARM-9 core includes a regular timer and a 64-bit timer.This patch adds a compile time option to the Makefile such that the old timer driver is chosen and compiled as default if none of timer configuration options are explicitly defined in the board configs. Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk2-13/+13
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk2-2/+0
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-21ARM: mach-at91: armv7: fix multiple cpu_reset definition when enabling SYSRESETClément Léger1-1/+3
When SYSRESET is enabled, cpu_reset function is also defined in sysreset-uclass.c which lead to multiple definitions of this function since reset.c is build unconditionally. Add a check in Makefile to build this file only if SYSRESET isn't enabled. SYSRESET can be enabled when building SYSRESET_PSCI for instance on this platform. Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21ARM: at91: Add chip ID of SAMA5D29Hari Prasath2-0/+3
Add SAMA5D29 SoC for identification during the boot up. Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
2021-09-04serial: Rename SERIAL_SUPPORT to SERIALSimon Glass1-1/+1
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-31Kconfig: Remove all default n/no optionsMichal Simek1-1/+0
default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@xilinx.com> [trini: Rework FSP_USE_UPD portion] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31Convert CONFIG_SKIP_LOWLEVEL_INIT et al to KconfigTom Rini1-2/+2
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-07arm: Remove at91rm9200ek boardsTom Rini1-5/+0
These boards have not been converted to CONFIG_DM_USB by the deadline and is also missing conversion to CONFIG_DM. Remove them. Cc: Andreas Bießmann <andreas@biessmann.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-17Merge tag 'u-boot-atmel-2021.10-a' of ↵WIP/17Jun2021-nextTom Rini1-2/+2
https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for the 2021.10 cycle: This feature set converts the boards pm9261 and pm9263 Ethernet support to DM; enables hash command for all SAM boards; fixes the NAND pmecc bit-flips correction; adds Falcon boot for sama5d3_xplained board; and other minor adjustments.
2021-06-07Revert "sama5d3: Fix Galois Field Table offsets"Tudor Ambarus1-2/+2
This reverts commit 786f888b743e9b83c9095cb9b5548ebe2e29afc5. Looks like the datasheet at https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D3-Series-Data-sheet-DS60001609b.pdf is wrong, and the testing was poorly done, because the PMECC did not raise any error, but also didn't correct any bitflips. Restoring the offsets as they were before, makes the PMECC on sama5d3x capable of correcting bitflips. Fixes: 786f888b74 ("sama5d3: Fix Galois Field Table offsets") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún1-1/+1
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10arm: Remove picosam9g45 boardTom Rini1-6/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Erik van Luijk <evanluijk@interact.nl> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove wb50n boardTom Rini1-9/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove wb45n boardTom Rini1-6/+0
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-03-30Merge tag 'u-boot-atmel-2021.07-a' of ↵WIP/30Mar2021-nextTom Rini2-8/+9
https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.07 cycle: This small feature set includes the implementation of the slew rate for the PIO4 pin controller device, and a fix for arm926ejs-based microprocessors that avoids a crash.
2021-03-22ARM: mach-at91: arm926ejs: fix data abort in startup returning from ↵Martin Townsend1-8/+8
lowlevel_init The startup code in arm/cpu/arm926ejs preserves the link register across the call to lowlevel_init by using r4: mov r4, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, r4 /* restore link */ The lowlevel_init function for at91 machines based on the same CPU uses r4 and hence corrupts it causing a data abort when it returns to the startup code. This patch fixes this by using r6 instead of r4 in the lowlevel_init function. Discovered and the fix was tested on a AT91SAM9261 based board. Signed-off-by: Martin Townsend <martin@rufilla.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler3-3/+3
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02pinctrl: at91-pio4: add support for slew-rateClaudiu Beznea1-0/+1
SAMA7G5 supports slew rate configuration. Adapt the driver for this. For switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass7-0/+7
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-22ARM: at91: spl: add spl_early_init for sama5d2 platformsGreg Gallagher1-0/+7
The dm root node is needed early in the spl to allow the timer to be used. This change calls spl_early_init to initialize the dm root node. Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22sam9x60.h: Fix Galois Field Table offsetsKai Stuhlemmer (ebee Engineering)1-2/+2
Because ATMEL_BASE_ROM is defined to 0x100000, it already points to the begin of the index table for 512 byte sectors correction. Thus its offset must be zero and the index of the table for 1024 byte sectors must start at offset 0x8000. Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de> [ta: update commit message] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22sama5d3: Fix Galois Field Table offsetsTudor Ambarus1-2/+2
Offsets are described in the datasheet at section: "11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction". For testing I "injected" bit flips into u-boot NAND memory area, and then read back. PMECC could not correct the errors. With the offsets updated everything is fine. Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22pinctrl: at91-pio4: implement drive strength supportEugen Hristev1-0/+1
Implement drive strength support, by preserving the same bindings as in Linux. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-12Merge tag 'u-boot-atmel-2021.04-a' of ↵Tom Rini1-0/+8
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2021.04 cycle This feature set includes the new board SAMA7G5 EK, the new evaluation kit for Microchip AT91 SAMA7G5 SoC . The current board support includes two configurations for booting from eMMC (SDMMC0), SD-Card (SDMMC1), and support for two Ethernet interfaces.
2021-01-07board: atmel: sama7g5ek: add initial support for sama7g5ekEugen Hristev1-0/+8
Add initial support for sama7g5 evaluation kit board. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-nextTom Rini2-2/+2
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini2-5/+11
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass2-2/+2
The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass4-4/+4
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-26ARM: mach-at91: fix timer.o compile conditionEugen Hristev1-1/+4
The AT91 architecture now has two possible timer blocks, the old PIT timer and the new PIT64B. The timer.c file has an old non DM driver that works for platforms that do not use the ATMEL_PIT_TIMER DM-based driver. Update the Makefile to select this old driver in case neither of the ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected. Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26ARM: at91: armv7: sama7g5 uses CCF clock driverNicolas Ferre2-4/+7
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older at91 clock.c driver. Remove it from the compilation list and adapt cpu.c arch_cpu_init() to avoid calling at91_clock_init() which is wrong anyway. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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