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2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-nextTom Rini2-2/+2
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini2-5/+11
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()Simon Glass2-2/+2
The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass4-4/+4
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-26ARM: mach-at91: fix timer.o compile conditionEugen Hristev1-1/+4
The AT91 architecture now has two possible timer blocks, the old PIT timer and the new PIT64B. The timer.c file has an old non DM driver that works for platforms that do not use the ATMEL_PIT_TIMER DM-based driver. Update the Makefile to select this old driver in case neither of the ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected. Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26ARM: at91: armv7: sama7g5 uses CCF clock driverNicolas Ferre2-4/+7
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older at91 clock.c driver. Remove it from the compilation list and adapt cpu.c arch_cpu_init() to avoid calling at91_clock_init() which is wrong anyway. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-10-19ARM: at91: Add chip ID for SAM9X60 SiPNicolas Ferre2-0/+9
SAM9X60 SiP (System in Package) are added for SoC identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2020-09-25ARM: mach-at91: add support for new SoC sama7g5Eugen Hristev5-0/+92
Add support for new SoC sama7g5 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-22ARM: at91: common: guard ATMEL_PIT code by ifdefEugen Hristev1-0/+2
Atmel PIT timer is not available for next products that have another timer hardware block. To be able to use the common at91 code, guard the code that uses PIT by ifdefs. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-22board: atmel: common: introduce at91_set_eth1addr for second interfaceEugen Hristev1-0/+1
We already have a function to retrieve the mac address from one EEPROM. For boards with a second Ethernet interface, however, we would require another EEPROM with a second unique MAC address. Introduce at91_set_eth1addr which will look for a second EEPROM and set the 'eth1addr' variable with the obtained MAC address. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-07-28Makefile: Rename ALL-y to INPUTS-ySimon Glass1-1/+1
When binman is in use, most of the targets built by the Makefile are inputs to binman. We then need a final rule to run binman to produce the final outputs. Rename the variable to indicate this, and add a new 'inputs' target. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09drivers: rename drivers to match compatible stringWalter Lozano2-8/+8
When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org>
2020-06-26Convert CONFIG_AT91_GPIO to KconfigTom Rini1-2/+0
This converts the following to Kconfig: CONFIG_AT91_GPIO Signed-off-by: Tom Rini <trini@konsulko.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass3-0/+3
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass4-0/+4
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass3-0/+3
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass8-0/+8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop flash.h from common headerSimon Glass1-0/+1
Move this uncommon header out of the common header. Fix up some style problems in flash.h while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18flash: Tidy up coding style for flash functionsSimon Glass1-4/+4
Some functions use the wrong code style and generate checkpatch errors. Fix these. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move hang() to the same header as panic()Simon Glass3-0/+3
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17common: Move reset_cpu() to the CPU headerSimon Glass3-0/+3
Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17common: Move get_tbclk() to time.hSimon Glass2-0/+2
This function related to timer and most of the timer functions are in time.h, so move this function there. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07Merge tag 'u-boot-atmel-2020.04-a' of ↵Tom Rini1-0/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2020.04 cycle This feature set is a patch series from Tudor Ambarus which includes parsing of the spi flash SFDP parser for SST flashes, and using those tables to retrieve unique saved per device MAC address. This is then used as base mac address on the SAMA5D2 Wireless SOM EK board.
2019-12-17board: atmel: sama5d27_wlsom1_ek: Set ethaddr from spi-nor flashTudor Ambarus1-0/+1
The SST26VF064BEUI spi-nor flash is programmed at the factory with a globally unique address stored in the SFDP vendor parameter table and it is permanently writeprotected. Retrieve the EUI-48 address and set it as ethaddr env. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-12-15dm: gpio: Allow control of GPIO uclass in SPLSimon Glass1-1/+1
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass is included in SPL/TPL without any control for boards. Some boards may want to disable this to reduce code size where GPIOs are not needed in SPL or TPL. Add a new Kconfig option to permit this. Default it to 'y' so that existing boards work correctly. Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to preserve the current behaviour. Also update the 74x164 GPIO driver since it cannot build with SPL. This allows us to remove the hacks in config_uncmd_spl.h and Makefile.uncmd_spl (eventually those files should be removed). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass1-0/+1
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move get_ticks() function out of common.hSimon Glass1-0/+1
This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02Move strtomhz() to vsprintf.hSimon Glass2-0/+2
At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-10-08ARM: at91: Add SFR definitionsTudor Ambarus1-3/+45
sama5's SFR has at offset 0x04 the DDR Configuration Register, while sam9x60's SFR contains the EBI Chip Select Register. Add a union to reconcile both boards. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Rename sama5_sfr.h to at91_sfr.hTudor Ambarus3-4/+4
The Special Function Registers (SFR) are present in sam9x5 and sam9x60 too, rename sama5_sfr to at91_sfr.h. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08board: atmel: Add sam9x60ek boardSandeep Sheriker Mallikarjun1-0/+7
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [tudor.ambarus@microchip.com: - fix number of DRAM banks: One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks] - drop SPL related macros - drop memtest macros - drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros - drop inclusion of asm/arch/at91sam9_smc.h] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08ARM: at91: Add sam9x60 socSandeep Sheriker Mallikarjun5-0/+301
Add new Microchip sam9x60 SoC based on an ARM926. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> [tudor.ambarus@microchip.com: fix SFR definition] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08board: atmel: sama5d2_wlsom1_ek: add SPL supportEugen Hristev1-0/+1
Add support for SPL for this board: DRAM initialization, PMC initialization, MMC boot. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: mpddrc: add lpddr2 initialization procedureEugen Hristev2-0/+185
Implement the lpddr2 initialization procedure for at91 mpddrc multi-port ddram controller. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08board: laird: wb50n: use configure_ddrcfg_input_buffersEugen Hristev1-0/+1
Replace code with new function configure_ddrcfg_input_buffers from SFR mach driver. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: sfr: implement DDR input buffers open functionEugen Hristev2-0/+14
Add a function in SFR implementation that will open the DDR input buffers. This can be called at DRAM initialization time. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: sfr: convert to KconfigEugen Hristev3-3/+14
This converts the at91 sfr to Kconfig Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08board: atmel: add sama5d27_wlsom1_ek boardNicolas Ferre1-0/+15
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiPNicolas Ferre2-0/+12
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-08-25Convert CONFIG_ARCH_CPU_INIT to KconfigAdam Ford1-1/+0
This converts the following to Kconfig: CONFIG_ARCH_CPU_INIT Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Felix Brack <fb@ltec.ch>
2019-06-10Merge tag 'u-boot-atmel-fixes-2019.07-a' of git://git.denx.de/u-boot-atmelTom Rini1-0/+8
First set of u-boot-atmel fixes for 2019.07 cycle
2019-06-06spl: at91: add support for SPL_AT91_MCK_BYPASSEugen Hristev1-0/+8
By default the configuration of the PMC is to have an external crystal connected that requires driving on both XIN and XOUT pins. The bypass configuration means that only XIN will be used, the SoC will not do any driving, and the XIN needs to be provided with a proper signal. This is the MOSCXTBY bit in the PMC main clock generator register. The SPL needs to properly initialize the PMC registers before switching to external clock signal and raising the clock to the cruise speed. Also created Kconfig for this specific configuration. By default this is disabled. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-05-05spl: fix linker size check off-by-one errorsSimon Goldschmidt1-2/+2
This fixes SPL linker script size checks for 3 lds files where the size checks were implemented as "x < YYY_MAX_SIZE". Fix the size checks to be "x <= YYY_MAX_SIZE" instead. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-26watchdog: at91sam9_wdt: Remove now superfluous wdt start and resetStefan Roese2-47/+0
With the new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). The watchdog servicing is enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-18board: atmel: add SAMA5D2 ICP boardEugen Hristev1-0/+12
The SAMA5D2 ICP Board features the SAMA5D27 SoC, together with QSPI Flash, Wilc3000 wireless device and EtherCat support. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-09arm: at91: Add gardena-gateway-at91sam supportStefan Roese1-0/+8
The GARDENA smart Gateway boards are equipped with an Atmel / Microchip AT91SAM9G25 SoC and with 128 MiB of RAM and 256 MiB of NAND storage. This patch adds support for this board including SPL support. Therefore the AT91Boostrap is not needed on this platform any more. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: arm926ejs/u-boot-spl.lds: Add _image_binary_end to SPL ldsStefan Roese1-0/+2
This patch adds _image_binary_end to the SPL linker script. This will be used be the upcoming GARDENA AT91SAM based platform, which uses DT in SPL and configures CONFIGURE_SPL_SEPARATE_BSS. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: Enable watchdog supportStefan Roese2-0/+58
This patch enables and starts the watchdog on the AT91 platform if configured. The WD timeout value is read in the AT91 WD device driver from the DT, using the "timeout-sec" DT property. If not provided in the DT, the default value of 2 seconds is used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-09arm: at91: spl_at91.c: Call spl_early_init() if OF_CONTROL is enabledStefan Roese1-0/+10
This patch adds a call to spl_early_init() to board_init_f() which is needed when CONFIG_SPL_OF_CONTROL is configured. This is necessary for the early SPL setup including the DTB setup for later usage. Please note that this call might also be needed for non SPL_OF_CONTROL board, like the smartweb target. But smartweb fails to build with this call because its binary grows too big. So I disabled it for these kind of targets for now. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de> Tested on the taurus board: Tested-by: Heiko Schocher <hs@denx.de>
2019-04-09arm: at91: Makefile: Compile lowlevel_init only when really necessaryStefan Roese1-0/+2
Make sure that lowlevel_init is not compiled when CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de> Tested on the taurus board: Tested-by: Heiko Schocher <hs@denx.de>
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