aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/include/asm
AgeCommit message (Collapse)AuthorFilesLines
2012-10-15mx25: add CPU revision 1.2Eric Benard1-0/+1
tested on a MCIMX257CJM4A which now reports : CPU: Freescale i.MX25 rev1.2 at 399 MHz Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2012-10-15i.MX6: get rid of redundant struct src_regs (dupe of struct src)Eric Nelson1-21/+0
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: define struct iomuxc and IOMUX_GPR2 register bitfieldsEric Nelson1-0/+73
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15i.MX6: Add ANATOP_PFD_480 bitfield constantsEric Nelson1-0/+24
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15i.MX6: define IOMUX_GPR3 register bitfieldsEric Nelson1-0/+48
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: define bitfields for CHSCCDR registerEric Nelson1-0/+4
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: change register name for CCM_CHSCCDR to match ref. manualEric Nelson1-1/+1
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in reference manual, but was named chscdr in struct mxc_ccm_reg. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fieldsEric Nelson1-179/+179
Add meaningful constants for each clock channels and use them for enabling and disabling i.MX6 clocks. Includes an update to enable/disable the IPU1 clock in drivers/video/ipu_common to remove IMX5x register access when used on i.MX6 as discussed in V1: http://patchwork.ozlabs.org/patch/185129/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15pxa: Add code to examine cpu model and revisionLukasz Dalek1-0/+13
Add function which return CPU model and revision which can be used for cpu detection. Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
2012-10-15tegra: nand: add board pinmuxLucas Stach1-0/+1
Boards may require a different pinmux setup for NAND than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15tegra: clean up board include hellLucas Stach1-1/+18
The prototypes used in board files were all scattered out, which lead to code duplication between SPL and normal U-Boot and some prototypes not actually being used. Consolidate this in a common board header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15tegra: add funcmux entry for NAND attached to KBCLucas Stach1-0/+1
Secondary config for the Flash attachment. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15tegra20: add clock_set_pllout functionLucas Stach3-2/+28
Common practice on Tegra 2 boards is to use the pllp_out4 FO to generate the ULPI reference clock. For this to work we have to override the default hardware generated output divider. This function adds a clean way to do so. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15tegra20: complete periph_id enumLucas Stach1-0/+6
Most Tegra boards output the ULPI reference clock on pad DEV2. Complete the periph_id enum so that we are able to enable this clock output circuit. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren21-410/+530
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15tegra20: add USB ULPI init codeLucas Stach1-5/+24
This adds the required code to set up a ULPI USB port. It is mostly a port of the Linux ULPI setup code with some tweaks added for more correctness, discovered along the way of debugging this. To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT have to be set in the board configuration file. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2012-10-15tegra20: port to new ehci interfaceLucas Stach1-2/+2
EHCI interface now supports more than one controller. Wire up our usb functions to use this new interface. Signed-off-by: Lucas Stach <dev@lynxeye.de>
2012-10-15usb: ehci: rework to take advantage of new lowlevel interfaceLucas Stach1-1/+9
Kill off ehci-core.h It was used to specify some static controller data. To support more than one controller being active at any time we have to carry the controller data ourselfes. Change the ehci interface accordingly. NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed to do the same thing as other platforms. But the change for now is at least compile clean. Signed-off-by: Lucas Stach <dev@lynxeye.de> Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-04ARM: Add Altera SOCFPGA Cyclone5Dinh Nguyen4-0/+119
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Tom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
2012-10-03Merge remote-tracking branch 'u-boot-marvell/master'Albert ARIBAUD3-3/+2
2012-10-03ARM: kirkwood/orion5x: Use reset_cpu definition in include/common.hDinh Nguyen2-2/+0
include/common.h has the reset_cpu defined already. No need to re-define here. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
2012-10-03kirkwood: implement kw_sdram_size_adjustGerlando Falauto1-0/+1
Size of the SDRAM chips might differ between any two (otherwise identical) instances of the same board. So add a function kw_sdram_size_adjust() which reads out the current ram size for a given bank, and adjusts the Kirkwood's SDRAM window size register accordingly. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2012-10-03kirkwood: fix mpp.h coding styleLuka Perkov1-1/+1
Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
2012-10-03ARM : Add GPIO Driver and IOMUX definition for S3C2440Gabriel Huau2-0/+371
It's now possible to use the gpio driver interface for s3c2440. This patch add iomux definitions too. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
2012-10-03arm: rmobile: Add support for ATMARK-TECHNO Armadillo-800EVA boardHideyuki Sano1-0/+13
The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM, Ethernet, and more. This patch supports the following functions: - 512MB DDR3-SDRAM - Serial console (SCIF) - Ethernet MAC(MII) & PHY(SMSC) Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support PFC of Renesas R8A7740Nobuhiro Iwamatsu2-0/+587
Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support Renesas R8A7740Nobuhiro Iwamatsu3-0/+307
Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdtTetsuyuki Kobayashi1-0/+2
Add dummy member to struct sh73a0_rwdt in sh73a0.h. Without this, initializing watch dog timer goes wrong. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: kzm9g: enable reset commandTetsuyuki Kobayashi1-0/+4
Do soft power on reset in U-Boot reset command. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: kzm9g: Adjust low level hardware settingTetsuyuki Kobayashi1-1/+3
Adjust low level hardware setting in s_init. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add supoprt for KMC KZM-A9-GT boardNobuhiro Iwamatsu1-0/+13
The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 512MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SMSC) - I2C Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support PFC of Renesas SH73A0Nobuhiro Iwamatsu1-0/+9
Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add support Renesas SH73A0Nobuhiro Iwamatsu4-0/+867
Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03arm: rmobile: Add basic support for Renesas R-MobileNobuhiro Iwamatsu1-0/+8
This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-03ARMv7: Add register definition of global timerNobuhiro Iwamatsu1-0/+36
ARMv7 has global timer. This provides the register definition of this timer. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-10-01am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XXJoel A Fernandes1-0/+1
U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use this info to read full U-boot from MMC1 as well. Cc: pprakash@ti.com Cc: trini@ti.com Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-10-01OMAP: networking support for SPLIlya Yanok1-0/+1
This patch adds support for networking in SPL. Some devices are capable of loading SPL via network so it makes sense to load the main U-Boot binary via network too. This patch tries to use existing network code as much as possible. Unfortunately, it depends on environment which in turn depends on other code so SPL size is increased significantly. No effort was done to decouple network code and environment so far. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-30Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD15-94/+366
2012-09-29Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD1-0/+2
2012-09-27ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini1-0/+32
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linuxTom Rini1-0/+5
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version. Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27SPL: Move the omap SPL framework to common/splTom Rini1-40/+0
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Start hooking in the current SPI SPL supportTom Rini1-0/+3
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Make spl_mmc.c more genericTom Rini2-5/+5
Move the default omap/related-centric board_mmc_init to arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>Tom Rini6-71/+196
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.cTom Rini1-1/+0
This detection code doesn't (and can't) do anything currently, so remove. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Rename omap_boot_mode to spl_boot_mode()Tom Rini1-1/+1
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27ARM: SPL: Rename omap_boot_device to spl_boot_deviceTom Rini1-1/+1
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini3-3/+1
Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-23mx51evk: Add CONFIG_REVISION_TAGBenoît Thébaudeau1-0/+2
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information. If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay. Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>