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path: root/arch/arm/include/asm/arch-mx6/crm_regs.h
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2015-09-02imx: clock support enet2 anatop clock supportPeng Fan1-0/+6
To i.MX6SX/UL, two ethernet interfaces are supported. Add ENET2 clock support: 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed. To value 1, only i.MX6SX/UL can pass the check. 2. Modify board code who use this api to follow new api prototype. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2015-08-02imx:mx6ul add clock supportPeng Fan1-31/+67
1. Add enet, uart, i2c, ipg clock support for i.MX6UL. 2. Correct get_periph_clk, it should account for MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK. 3. Refactor get_mmdc_ch0_clk to make all i.MX6 share one function, but not use 'ifdef'. 4. Use CONFIG_FSL_QSPI for enable_qspi_clk, but not #ifdef CONFIG_MX6SX. 5. Use CONFIG_PCIE_IMX for pcie clock settings, use CONFIG_CMD_SATA for sata clock settings. In this way, we not need "#if defined(CONFIG_MX6Q) || defined....", only need one CONFIG_PCIE_IMX in header file. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02imx: mx6: ccm: Change the clock settings for i.MX6QPPeng Fan1-23/+25
Since i.MX6QP changes some CCM registers, so modify the clocks settings to follow the hardware changes. In c files, use runtime check and discard #ifdef. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2015-07-10imx: mx6 add i2c4 clock support for i.MX6SXPeng Fan1-3/+2
Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove `#ifdef ..` in crm_regs.h, or gcc will fail to compile the code succesfully. Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-05-26arm, imx6, i2c: add I2C4 for MX6DLHeiko Schocher1-0/+2
add I2C4 modul for MX6DL based boards. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-17ARM: imx6: disable bandgap self-bias after bootPeng Fan1-0/+2
The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-11-03imx: mx6sl: Add perclk_clk_sel bit define in CCMYe.Li1-0/+2
The MX6SL has the perclk_clk_sel to select the perclk source. Add its define in CCM Signed-off-by: Ye.Li <B37916@freescale.com>
2014-10-30arm: arch-mx6: typo fixes in crm_regs.hSoeren Moch1-4/+4
fix typos in video pll related register names and bit defines Signed-off-by: Soeren Moch <smoch@web.de>
2014-10-30arm: imx6: fix typos in CCM_ANALOG_PLL_VIDEO_DENOM register nameAnatolij Gustschin1-1/+1
Fix name for Video PLL denominator register. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2014-08-20mx6sxsabresd: Add Ethernet supportFabio Estevam1-0/+1
mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031. Add support for one FEC port initially. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADEDFabio Estevam1-1/+1
According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of register CCM_CIMR corresponds to bit 19 so fix its definition accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08mx6: crm_regs: Fix MXC_CCM_CLPCR_WB_PER_AT_LPM definitionFabio Estevam1-1/+1
According to the Reference Manual the 'wb_per_at_lpm' field of register CCM_CLPCR corresponds to bit 16 so fix its definition accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offsetFabio Estevam1-2/+2
According to the Reference Manual the 'spdif0_clk_podf' field of register CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset definitions accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10mx6: Add support for the mx6solox variantFabio Estevam1-0/+170
mx6solox is the newest member of the mx6 family. Some of the new features on this variants are: - Cortex M4 microcontroller (besides the CortexA9) - Dual Gigabit Ethernet Add the initial support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-17mx6: Revert "mx6: soc: Disable VDDPU regulator"Fabio Estevam1-1/+0
Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang for people using FSL kernel 3.0.35 and 3.10, so revert it for now. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Reported-by: Pierre Aubert <p.aubert@staubli.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02mx6: soc: Disable VDDPU regulatorFabio Estevam1-0/+1
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator in order to save power. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-10-17mx6: compute PLL PFD frequencies rather than using definesPierre Aubert1-11/+0
Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de>
2013-09-20ARM: arch-mx6: fix PLL2_PFD2_FREQMarkus Niebel1-1/+1
according to the manual frequency of PLL2 PFD2 is 396.000.000 instead of 400.000.000 Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Acked-by: Stefano Babic <sbabic@denx.de>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk1-14/+1
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-04-25nitrogen6x: Setup CCM_CCOSR registerFabio Estevam1-0/+1
CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard. Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers." Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-25arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.hStefan Roese1-86/+86
Add spaces before and after "<<". Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability. Signed-off-by: Stefan Roese <sr@denx.de>
2013-04-22imx: Add titanium board support (i.MX6 based)Stefan Roese1-2/+5
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-22mx6: Add solo-lite variant supportFabio Estevam1-0/+5
mx6 solo-lite is another member of the mx6 series. For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-03-07i.MX6: crm_regs: define CCM_CCGRx for use in board config filesEric Nelson1-0/+12
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: define bitfields for CHSCCDR registerEric Nelson1-0/+4
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: change register name for CCM_CHSCCDR to match ref. manualEric Nelson1-1/+1
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in reference manual, but was named chscdr in struct mxc_ccm_reg. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-15i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fieldsEric Nelson1-179/+179
Add meaningful constants for each clock channels and use them for enabling and disabling i.MX6 clocks. Includes an update to enable/disable the IPU1 clock in drivers/video/ipu_common to remove IMX5x register access when used on i.MX6 as discussed in V1: http://patchwork.ozlabs.org/patch/185129/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-05-15imx-common: Factor out get_ahb_clk()Fabio Estevam1-0/+892
get_ahb_clk() is a common function between mx5 and mx6. Place it into imx-common directory. Cc: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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