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path: root/arch/arm/dts/zynq-7000.dtsi
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2023-03-09ARM: zynq: Comment interrupt names IRQs for pl330Michal Simek1-2/+4
2023-03-09ARM: dts: zynq-7000: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski1-2/+0
2023-03-09ARM: zynq: Use recommended dma-controller name instead of dmacMichal Simek1-1/+1
2023-03-09xilinx: dts: Remove cdns,zynq-gemMichal Simek1-2/+2
2023-02-14dm: dts: Convert driver model tags to use new schemaSimon Glass1-4/+4
2022-11-22ARM: zynq: DT: Enable all FCLKs by defaultChristian Kohn1-1/+1
2022-09-13ARM: zynq: DT: List OCM memoryMichal Simek1-0/+11
2022-09-13ARM: zynq: Align qspi node name with Linux kernelMichal Simek1-5/+5
2022-09-13arm: dts: Add xlnx prefix to GEM compatible stringHarini Katakam1-2/+2
2022-09-12zynq: Convert arm twd timer to DM driverStefan Herbrechtsmeier1-0/+1
2022-06-24ARM: zynq: Fix size-cells for pl353 driverAmit Kumar Mahapatra1-1/+1
2022-03-07ARM: dts: zynq: add NAND flash controller nodeMichael Walle1-27/+30
2021-06-23ARM: zynq: Rename bus to be align with simple-bus yamlMichal Simek1-1/+1
2020-01-14ARM: dts: zynq: enablement of coresight topologyZumeng Chen1-0/+135
2019-10-24ARM: zynq: Add missing pl353-smc nodeMichal Simek1-0/+27
2019-02-15ARM: dts: Use mmc@ instead sdhci@Michal Simek1-2/+2
2018-10-16arm: zynq: Add efuse node for Zynq-7000S devicesMichal Simek1-0/+5
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2018-01-30arm: zynq: Fix pmu register description coding styleMichal Simek1-1/+2
2017-11-28arm: zynq: Sync location of DT properties with LinuxMichal Simek1-1/+1
2017-08-02arm: zynq: Label whole PL part as fpga_full regionMichal Simek1-0/+8
2017-02-17zynq: Move zynq to clock frameworkStefan Herbrechtsmeier1-0/+2
2017-01-10ARM: zynq: Remove spi-max-frequencyMichal Simek1-2/+0
2016-12-20ARM: dt: zynq: Add labels to cpu nodes to allow overriding OPPs.Moritz Fischer1-2/+2
2016-11-15ARM: zynq: Remove DTC 1.4.2 warningsMichal Simek1-3/+4
2016-05-24ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-busMasahiro Yamada1-1/+1
2016-04-13ARM: zynq: Align devcfg nodeMichal Simek1-0/+4
2016-04-13ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer1-0/+1
2016-04-13ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer1-0/+7
2016-04-13ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek1-0/+2
2016-01-27ARM: zynq: Clean DTSI coding styleMichal Simek1-5/+5
2015-11-04arm: zynq: dts: Add U-Boot device tree additionsSimon Glass1-0/+1
2015-10-25dts: zynq: Add zynq qspi controller nodesJagan Teki1-0/+12
2015-07-28ARM: zynq: DT: Add missing interrupt for L2 pl310Michal Simek1-0/+1
2015-07-28ARM: zynq: DT: Get rid of ps-clk-frequencyMichal Simek1-1/+0
2015-07-28ARM: zynq: DT: Update years in copyrightMichal Simek1-1/+1
2015-07-28ARM: zynq: DT: Add reference to bus nodeMichal Simek1-1/+1
2015-07-28ARM: zynq: DT: Add pinctrl nodeMichal Simek1-1/+7
2015-07-28ARM: zynq: DT: Cleanup address-cells and size-cellsMichal Simek1-1/+4
2015-07-28ARM: zynq: DT: Clean up timer device tree nodesMichal Simek1-2/+2
2015-07-28ARM: zynq: DT: Use the zynq binding with macbMichal Simek1-2/+2
2015-07-28ARM: zynq: DT: Fix GEM register area sizeMichal Simek1-2/+2
2015-07-28spi: Fix zynq SPI bindingMichal Simek1-2/+2
2015-07-28ARM: zynq: DT: Remove 222 MHz OPPMichal Simek1-1/+0
2015-07-28ARM: zynq: DT: Migrate UART to Cadence bindingMichal Simek1-4/+4
2015-07-28ARM: zynq: DT: Add a fixed regulator for CPU voltageMichal Simek1-0/+10
2015-07-28ARM: zynq: DT: Add missing nodes to DTSIMichal Simek1-0/+100
2015-07-28ARM: zynq: DT: Use the right names for nodesMichal Simek1-10/+10
2015-07-01spi: zynq_spi: Add fdt support in driverJagan Teki1-0/+2
2015-07-01dts: zynq: Add zynq spi controller nodesJagan Teki1-0/+24
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