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path: root/arch/arm/dts/socfpga_arria10.dtsi
AgeCommit message (Expand)AuthorFilesLines
2019-01-11ARM: dts: socfpga: Add missing SDMMC resetTien Fong Chee1-0/+1
2018-11-29spi: cadence_qspi: use "cdns,qspi-nor" as compatibleSimon Goldschmidt1-1/+1
2018-08-24ARM: dts: socfpga: Add missing NAND resetMarek Vasut1-0/+1
2018-08-24ARM: dts: socfpga: Flag timer clock as pre-relocMarek Vasut1-0/+10
2018-08-13ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodesMarek Vasut1-0/+8
2018-08-13ARM: dts: socfpga: Add missing I2C resetsMarek Vasut1-0/+10
2018-08-13ARM: dts: socfpga: Fix Arria10 GMAC resetsMarek Vasut1-4/+6
2018-08-13ARM: dts: socfpga: Add missing UART resetsMarek Vasut1-0/+2
2018-08-13ARM: dts: socfpga: Flag reset manager on A10 as pre-relocMarek Vasut1-0/+2
2018-07-25ARM: dts: socfpga: Adjust NAND register layout on Arria10Marek Vasut1-2/+2
2018-05-18ARM: socfpga: Synchronize Arria10 DTsMarek Vasut1-302/+292
2018-01-24dts: cadence_spi: Sync DT bindings with LinuxJason Rush1-2/+2
2017-05-18arm: dts: Add dts and dtsi for Arria 10Ley Foon Tan1-0/+869
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