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path: root/arch/arm/cpu/armv8/cache_v8.c
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2020-05-25armv8: cache_v8: fix mmu_set_region_dcache_behaviourPeng Fan1-1/+1
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
2020-05-18common: Drop net.h from common headerSimon Glass1-0/+1
2020-01-17common: Move hang() to the same header as panic()Simon Glass1-0/+1
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass1-0/+1
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner1-6/+6
2019-05-05arch: armv8: Provide a way to disable cache maintenance opsVignesh Raghavendra1-0/+10
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2017-12-04armv8: mmu: fix page table mappingPeng Fan1-1/+4
2017-05-11arm: Support cache invalidateSimon Glass1-1/+1
2017-03-14armv8: mmu: Add a function to change mapping attributesYork Sun1-4/+68
2016-11-07armv8: add hooks for all cache-wide operationsStephen Warren1-3/+5
2016-08-05armv8: mmu: Detect page table overflow in emergency pt creationAlexander Graf1-0/+4
2016-07-15armv8: mmu: Add support of non-identical mappingYork Sun1-17/+20
2016-07-15armv8: mmu: split block if necessaryYork Sun1-32/+38
2016-07-15armv8: mmu: house cleaningYork Sun1-5/+8
2016-03-21arm64: Fix layerscape mmu setupAlexander Graf1-1/+1
2016-03-15arm64: Only allow dcache disabled in SPL buildsAlexander Graf1-0/+9
2016-03-15arm64: Remove non-full-va map codeAlexander Graf1-90/+0
2016-03-15thunderx: Move mmu table into board fileAlexander Graf1-5/+3
2016-03-15arm64: Make full va map code more dynamicAlexander Graf1-55/+398
2016-03-15arm64: Disable TTBR1 maps in EL1Alexander Graf1-1/+1
2016-03-15thunderx: Calculate TCR dynamicallyAlexander Graf1-1/+58
2016-01-19armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov1-0/+77
2015-11-30armv8/layerscape: Update MMU table with execute-never bitsAlison Wang1-2/+2
2015-11-10armv8: allow custom MMU setup routines on ARMv8Stephen Warren1-1/+1
2015-10-15armv8/mmu: Set bits marked RES1 in TCRThierry Reding1-3/+3
2015-09-01armv8: fsl-lsch3: Rewrite MMU translation table entriesAlison Wang1-4/+13
2015-08-12ARM: cache: implement a default weak flush_cache() functionWu, Josh1-8/+0
2015-08-12ARM: cache: add an empty stub function for invalidate/flush dcacheWu, Josh1-8/+0
2015-07-31armv8: caches: Added routine to set non cacheable regionSiva Durga Prasad Paladugu1-0/+36
2015-07-28armv8/cache: Fix page table creationThierry Reding1-2/+2
2015-02-24armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stackYork Sun1-7/+11
2014-07-03ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoCYork Sun1-1/+6
2014-07-03ARMv8: Adjust MMU setupYork Sun1-30/+20
2014-04-07armv8/cache: Change cache invalidate and flush functionYork Sun1-1/+2
2014-04-07armv8/cache: Consolidate setting for MAIR and TCRYork Sun1-3/+19
2014-01-09arm64: core supportDavid Feng1-0/+219