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path: root/arch/arm/cpu/armv7/zynq/slcr.c
AgeCommit message (Expand)AuthorFilesLines
2015-04-29ARM: zynq: move SoC sources to mach-zynqMasahiro Yamada1-203/+0
2015-04-29zynq: slcr: Disable all level shiftersSiva Durga Prasad Paladugu1-0/+7
2015-01-26ARM: zynq: slcr: Dont modify the reserved bitsSiva Durga Prasad Paladugu1-1/+1
2014-05-14ARM: zynq: ehci: Added USB host driver supportMichal Simek1-0/+24
2014-05-14ARM: zynq: Add MIO detection codeMichal Simek1-0/+50
2014-05-14ARM: zynq: Setup correct slcr_lock valueMichal Simek1-2/+6
2014-05-14ARM: zynq: slcr: Fix incorrect commentaryMichal Simek1-2/+2
2014-05-14ARM: zynq: Fix sparse warnings in slcr.cMichal Simek1-0/+1
2014-02-19net: zynq_gem: Calculate clock dividers dynamicallySoren Brinkmann1-5/+8
2014-02-19net: zynq_gem: Move RCLK details out of driverSoren Brinkmann1-3/+3
2014-01-10zynq: Add support to find bootmodeJagannadha Sutradharudu Teki1-0/+6
2013-08-12zynq: slcr: Wait 100ms till clk is properly setupMichal Simek1-1/+1
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk1-17/+1
2013-05-06fpga: zynq: Add support for loading bitstreamMichal Simek1-0/+35
2013-04-30net: gem: Fix gem driver on 1Gbps LANMichal Simek1-0/+26
2013-02-07arm: zynq: Add SLCR support with system resetMichal Simek1-0/+63