| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2012-09-01 | tegra20: rename tegra2 -> tegra20 | Allen Martin | 1 | -1087/+0 |
| 2012-07-07 | tegra: Correct PLL access in ap20.c and clock.c | Simon Glass | 1 | -2/+2 |
| 2012-05-15 | tegra2: trivially enable 13 mhz crystal frequency | Lucas Stach | 1 | -1/+4 |
| 2012-05-15 | tegra: Add functions to access low-level Osc/PLL details | Simon Glass | 1 | -0/+32 |
| 2012-03-29 | tegra: Enhance clock support to handle 16-bit clock divisors | Simon Glass | 1 | -22/+41 |
| 2012-03-29 | tegra: fdt: Add function to return peripheral/clock ID | Simon Glass | 1 | -0/+58 |
| 2011-12-24 | tegra: add clock_ll_start_uart() to enable UART prior to reloc | Simon Glass | 1 | -0/+14 |
| 2011-10-27 | tegra2: Add more clock functions | Simon Glass | 1 | -5/+816 |
| 2011-10-27 | tegra2: Rename CLOCK_PLL_ID to CLOCK_ID | Simon Glass | 1 | -3/+3 |
| 2011-09-10 | tegra2: fix warning: "assert" redefined | Wolfgang Denk | 1 | -8/+0 |
| 2011-09-04 | Tegra2: Add more clock support | Simon Glass | 1 | -0/+158 |
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